ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 144

• Manufacturer Part Number: ML610Q428-NNNTBZ03A7
• Description: MCU 8BIT 48K FLASH 128-TQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q428-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 4.2MHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.2.9
Address: 0F0ACH
Access: R/W
Access size: 8 bits
Initial value: 00H
Address: 0F0ADH
Access: R/W
Access size: 8 bits
Initial value: 00H
PW1CL and PW1CH are special function registers (SFRs) that function as 16-bit binary counters.
When data is written to either PW1CL or PW1CH, PW1CL and PW1CH is set to “0000H”. The data that is written is
meaningless.
When data is read from PW1CL, the value of PW1CH is latched. When reading PW1CH and PW1CL, use a word type
instruction or pre-read PW1CL.
The contents of PW1CH and PW1CL during PWM operation cannot be read depending on the combination of the
PWM clock and system clock. Table 10-2 shows PW1CH and PW1CL read enable/disable for each combination of the
PWM clock and system clock.
PW1DH
At reset
At reset
PW1CL
R/W
R/W
External clock
PWM1 Counter Registers (PW1CH, PW1CL)
PWM clock
HTBCLK
HTBCLK
Table 10-2 PW1CH and PW1CL Read Enable/Disable during PWM1 Operation
LSCLK
LSCLK
P1CK
P1C15
P1C7
R/W
R/W
7
0
7
0
P1C14
P1C6
R/W
R/W
System clock
0
0
6
6
SYSCLK
HSCLK
HSCLK
HSCLK
LSCLK
LSCLK
LSCLK
P1C13
P1C5
R/W
R/W
5
0
5
0
Read enabled
Read enabled. However, to prevent the reading of undefined data
during counting, read consecutively PW1CH or PW1CL twice
until the last data coincides the previous data.
Read disabled
Read enabled
Read disabled
P1C12
P1C4
R/W
R/W
10 – 10
4
0
4
0
PW1CH and PW1CL read enable/disable
P1C11
P1C3
R/W
R/W
3
0
3
0
ML610Q428/ML610Q429 User’s Manual
P1C10
P1C2
R/W
R/W
2
0
2
0
P1C1
P1C9
R/W
R/W
1
0
1
0
Chapter 10 PWM
P1C0
P1C8
R/W
R/W
0
0
0
0