ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 56
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ML610Q428-NNNTBZ03A7
Manufacturer Part Number
ML610Q428-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q428-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
750
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
- ML610Q482P-NNNTB03A7 PDF datasheet
- ML610Q428-NNNTBZ03A7 PDF datasheet #2
- ML610Q428-NNNTBZ03A7 PDF datasheet #3
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- Download datasheet (3Mb)
4.3.3.2
Note:
The STOP mode is entered two cycles after the instruction that sets the STP bit to “1” and up to two instructions are
executed during the period between STOP mode release and a transition to interrupt processing. Therefore, place two
NOP instructions next to the instruction that set the STP bit to “1”.
When the CPU is operating with a high-speed clock and the STP bit of SBYCON is set to “1” with the stop code
acceptor enabled, the STOP mode is entered and high-speed oscillation and low-speed oscillation stop.
When the NMI interrupt request or the interrupt-enabled (the interrupt enable flag is “1”) P00 to P07 interrupt request
is issued, the STP bit is set to “0” and the low-speed and high-speed oscillation restart.
When an interrupt request is issued, the STOP mode is released after the elapse of the high-speed oscillation start time
(TXTH/TRC) and the high-speed clock (OSCLK) oscillation stabilization time (8192-pulse count), the mode is
returned to the program run mode, and the high-speed clocks (OSCLK and HSCLK) restart supply to the peripheral
circuits.
The low-speed clock (LSCLK) restarts supply to the peripheral circuits after the elapse of the low-speed oscillation
start time (TXTL) and low-speed clock (LSCLK) oscillation settling time (8192 count).
For the high-speed oscillation start time (TXTH) and low-speed oscillation start time (TXTL), see the “Electrical
Characteristics” Section in Appendix C.
Figure 4-4 shows the operation waveforms in STOP mode when CPU operates with the high-speed clock.
Figure 4-4 Operation Waveforms in STOP Mode When CPU Operates with High-Speed Clock
High-speed oscillation
Low-speed oscillation
SBYCON.STP bit
Interrupt request
OSCLK, HSCLK
STOP Mode When CPU Operates with High-Speed Clock
waveform
waveform
SYSCLK
LSCLK
Program operating mode
High-speed oscillation waveform
OSCLK and HSCLK waveforms
HSCLK waveform
4 – 13
Hiz
STOP mode
T
XTH
T
ML610Q428/ML610Q429 User’s Manual
/T
XTL
RC
Chapter 4 MCU Control Function
High-speed oscillation
8192-pulse count
8192-pulse count
Low-speed oscillation waveform
High-speed oscillation waveform
OSCLK and HSCLK waveforms
Program operating mode
HSCLK waveform
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