ML610Q432A-NNNTC03A7 Rohm Semiconductor, ML610Q432A-NNNTC03A7 Datasheet - Page 235
ML610Q432A-NNNTC03A7
Manufacturer Part Number
ML610Q432A-NNNTC03A7
Description
MCU 8BIT 64K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q432A-NNNTC03A7.pdf
(35 pages)
3.ML610Q432A-NNNTC03A7.pdf
(458 pages)
Specifications of ML610Q432A-NNNTC03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Price
Company:
Part Number:
ML610Q432A-NNNTC03A7
Manufacturer:
Rohm
Quantity:
750
Company:
Part Number:
ML610Q432A-NNNTC03A7
Manufacturer:
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Quantity:
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Figure 16-5 shows the operation timing and control method when an acknowledgment error occurs.
When the values of the transmitted bit and the SDA pin do not coincide, the I20ER bit of the I2C bus 0 status register
(I2C0STAT) is set to “1” and SDA pin remains the output until termination of the subsequent byte data communication
I20ER bit is initialized to “0” by writing I
Figure 16-6 shows the operation timing and control method when transmission fails.
Figure 16-5 Operation Suspend Timing at Occurrence of Acknowledgment Error
Figure 16-6 Operation Timing When Transmission Fails
I20ER
Register
setting
SDA
I2C0INT
I20ST
I2C0RD
Register
setting
SDA
I2C0INT
I20ST
I2C0RD
I20ACR
2
C Bus 0 Control Register (I2C0COCON).
I2C0SA=”xxxxxxx0B”
I2C0CON=”01H”
I2C0SA=”xxxxxxx0B”
I2C0CON=”01H”
S A
S A
6
6
A
5
A
Value of I2C0SA
5
A
4
Transmission failure
A
4
16 – 12
A
3
A
3
A
2
A
1
A
0
Acknowledgment error
W
R
A
A
ML610Q431/ML610Q432 User’s Manual
I2C0CON=”00H”
Value of I2C0SA
I2C0CON=”02H”
Undefined data
P
Chapter 16 I
2
C Bus Interface
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