ML610Q432A-NNNTC03A7 Rohm Semiconductor, ML610Q432A-NNNTC03A7 Datasheet - Page 260

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ML610Q432A-NNNTC03A7

Manufacturer Part Number
ML610Q432A-NNNTC03A7
Description
MCU 8BIT 64K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor

Specifications of ML610Q432A-NNNTC03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Price
Part Number:
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20.
20.1 Overview
20.1.1
20.1.2
20.1.3
This LSI includes 3-bit Port 2 (P20 to P22) dedicated to output.
Port 2 can output low-speed clock (LSCLK), high-speed output clock (OUTCLK), and melody as a secondary function.
For clock output and melody 0 (MD0) output, see Chapter 6, “Clock Generation Circuit” and Chapter 24, “Melody
Driver”, respectively.
• Allows direct LED drive.
• Allows selection of high-impedance output mode, P-channel open drain output mode, N-channel open drain output
• Allows output of low-speed clock (LSCLK), high-speed clock (OUTCLK), or melody 0 (MD0) as a secondary
Figure 20-1 shows the configuration of Port 2.
P21/LED1/OUTCLK
mode, or CMOS output mode for each bit.
function.
P20/LED0/LSCLK
P22/LED2/MD0
Pin name
Port 2
Configuration
List of Pins
Features
P2D
P2CON0
P2CON1
P2MOD
P20 to P22
I/O
O
O
O
3
: Port 2 data register
: Port 2 control register 0
: Port 2 control register 1
: Port 2 mode register
V
V
DD
SS
Output port, Direct LED drive
Output port, Direct LED drive
Output port, Direct LED drive
Figure 20-1 Configuration of Port 2
V
V
Primary function
DD
SS
Controller
Output
Port2
20 – 1
P2CON0
P2CON1
P2MOD
P2D
ML610Q431/ML610Q432 User’s Manual
Low-speed clock output (LSCLK)
High-speed clock output (OUTCLK)
Melody 0 output (MD0)
3
Data bus
Secondary function
LSCLK
OUTCLK
MD0
Chapter 20 Port 2

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