ML610Q435A-NNNTC03A7 Rohm Semiconductor, ML610Q435A-NNNTC03A7 Datasheet - Page 10

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ML610Q435A-NNNTC03A7

Manufacturer Part Number
ML610Q435A-NNNTC03A7
Description
MCU 8BIT 96K FLASH 144-LQFP
Manufacturer
Rohm Semiconductor

Specifications of ML610Q435A-NNNTC03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
96KB (48K x 16)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q435A-NNNTC03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
Chapter 16
Chapter 17
Chapter 18
16. I
17. NMI Pin ........................................................................................................................................................ 17-1
18. Port 0............................................................................................................................................................. 18-1
15.4 Specifying port registers ......................................................................................................................... 15-18
16.1 Overview................................................................................................................................................... 16-1
16.2 Description of Registers............................................................................................................................ 16-2
16.3 Description of Operation........................................................................................................................... 16-9
16.4 Description of Operation......................................................................................................................... 16-14
17.1 Overview................................................................................................................................................... 17-1
17.2 Description of Registers............................................................................................................................ 17-2
17.3 Description of Operation........................................................................................................................... 17-5
18.1 Overview................................................................................................................................................... 18-1
18.2 Description of Registers............................................................................................................................ 18-2
15.3.4
15.3.5
15.4.1
15.4.2
16.1.1
16.1.2
16.1.3
16.2.1
16.2.2
16.2.3
16.2.4
16.2.5
16.2.6
16.2.7
16.3.1
16.3.2
16.3.3
16.4.1
17.1.1
17.1.2
17.1.3
17.2.1
17.2.2
17.2.3
17.3.1
18.1.1
18.1.2
18.1.3
18.2.1
18.2.2
16.3.1.1 Start Condition............................................................................................................................... 16-9
16.3.1.2 Restart Condition........................................................................................................................... 16-9
16.3.1.3 Slave Address Transmit Mode....................................................................................................... 16-9
16.3.1.4 Data Transmit Mode...................................................................................................................... 16-9
16.3.1.5 Data Receive Mode ....................................................................................................................... 16-9
16.3.1.6 Control Register Setting Wait State............................................................................................... 16-9
16.3.1.7 Stop Condition............................................................................................................................. 16-10
2
C Bus Interface........................................................................................................................................... 16-1
Transmit Operation ......................................................................................................................... 15-14
Receive Operation........................................................................................................................... 15-16
Functioning P43(TXD0) and P42(RXD0) as the UART ................................................................ 15-18
Functioning P43(TXD0) and P02(RXD0) as the UART ................................................................ 15-19
Features............................................................................................................................................. 16-1
Configuration .................................................................................................................................... 16-1
List of Pins........................................................................................................................................ 16-1
List of Registers ................................................................................................................................ 16-2
I
I
I
I
I
I
Communication Operating Mode...................................................................................................... 16-9
Communication Operation Timing ................................................................................................. 16-11
Operation Waveforms..................................................................................................................... 16-13
Functioning P41(SCL) and P40(SDA) as the I2C .......................................................................... 16-14
Features............................................................................................................................................. 17-1
Configuration .................................................................................................................................... 17-1
List of Pins........................................................................................................................................ 17-1
List of Registers ................................................................................................................................ 17-2
NMI Data Register (NMID).............................................................................................................. 17-3
NMI Control Register (NMICON) ................................................................................................... 17-4
Interrupt Request............................................................................................................................... 17-5
Features............................................................................................................................................. 18-1
Configuration .................................................................................................................................... 18-1
List of Pins........................................................................................................................................ 18-1
List of Registers ................................................................................................................................ 18-2
Port 0 Data Register (P0D) ............................................................................................................... 18-3
2
2
2
2
2
2
C Bus 0 Receive Register (I2C0RD).............................................................................................. 16-3
C Bus 0 Slave Address Register (I2C0SA) .................................................................................... 16-4
C Bus 0 Transmit Data Register (I2C0TD) .................................................................................... 16-5
C Bus 0 Control Register (I2C0CON)............................................................................................ 16-6
C Bus 0 Mode Register (I2C0MOD).............................................................................................. 16-7
C Bus 0 Status Register (I2C0STAT) ............................................................................................ 16-8
Contents – 6
ML610Q435/ML610Q436 User’s Manual
Contents

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