ML610Q435A-NNNTC03A7 Rohm Semiconductor, ML610Q435A-NNNTC03A7 Datasheet - Page 43

• Manufacturer Part Number: ML610Q435A-NNNTC03A7
• Description: MCU 8BIT 96K FLASH 144-LQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q435A-NNNTC03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 4.2MHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3.
3.1
• Software reset by execution of the BRK instruction
3.1.1
• The RESER_N pin has an internal pull-up resistor
• The low-speeed oscillation stop deteciton time is 3 ms (typ.)
• 250 ms, 1 sec, 4 sec, or 16 sec can be selected as the 2
• Built-in reset status register (RSTAT) indicating the reset generation causes
• Only the CPU is reset by the BRK instruction (neither the RAM area nor the SFR area are reset).
3.1.2
Figure 3-1 shows the configuration of the reset generation circuit.
3.1.3
This LSI has the five reset functions shown below. If any of the five reset conditions is satisfied, this LSI enters system
reset mode.
• Reset by the RESET_N pin
• Reset by power-on detection
• Reset by the low-speed oscillation stop detection
• Reset by the 2
RESET_N
Pin name
RESET_N
Reset Function
Overview
List of Pin
Features
Configuration
RSTAT: Reset status register
nd
watchdog timer (WDT) overflow
I/O
I
V
Low-speed Oscillation
DD
Power-on reset
stop detect reset
Figure 3-1 Configuration of Reset Generation Circuit
WDT reset
Reset input pin
nd
3 – 1
Description
watchdog timer (WDT) overflow period
ML610Q435/ML610Q436 User’s Manual
RSTAT
Chapter 3 Reset Function
Reset signal
Data bus