SC28L92A1A NXP Semiconductors, SC28L92A1A Datasheet - Page 51

UART, DUAL, 3.3V OR 5V, SMD, 28L92

SC28L92A1A

Manufacturer Part Number
SC28L92A1A
Description
UART, DUAL, 3.3V OR 5V, SMD, 28L92
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC28L92A1A

No. Of Channels
2
Supply Voltage Range
2.97V To 3.63V, 4.5V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
PLCC
No. Of Pins
44
Svhc
No SVHC (18-Jun-2010)
Operating
RoHS Compliant
Data Rate
230.4Kilobaud
Uart Features
Programmable Channel Mode, Line Break Detection & Generation
Rohs Compliant
Yes

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NXP Semiconductors
9. Static characteristics
Table 65.
V
[1]
[2]
[3]
[4]
SC28L92_7
Product data sheet
Symbol
V
V
V
V
I
I
I
I
I
I
I
I
I
I(1XPD)
IL(X1)
IH(X1)
I
OZH
OZL
ODL
ODH
CC
CC
IL
IH
OL
OH
= 5 V
The following conditions apply:
a) Parameters are valid over specified temperature and voltage range.
b) All voltage measurements are referenced to ground. For testing, all inputs swing between 0.4 V and 3.0 V with a transition time of
c) Typical values are at 25 C, typical supply voltages, and typical processing parameters.
Test conditions for outputs: C
constant current source = 2.6 mA.
Input port pins have active pull-up transistors that will source a typical 2 A from V
V
All outputs are disconnected. Inputs are switching between CMOS levels of V
CC
5 ns maximum. For X1/CLK this swing is between 0.4 V and 0.8V
and 2.0 V, and output voltages of 0.8 V and 2.0 V, as appropriate.
source 0.0 A.
Static characteristics, 5 V operation
10 %; T
Parameter
input LOW voltage
input HIGH voltage
output LOW voltage
output HIGH voltage
Power-down mode input current
on pin X1/CLK
operating input LOW current on
pin X1/CLK
operating input HIGH current on
pin X1/CLK
input leakage current
output off current HIGH, 3-state
data bus
output off current LOW, 3-state
data bus
open-drain output LOW current
in off state
open-drain output HIGH current
in off state
power supply current
amb
= 40 C to +85 C; unless otherwise specified.
L
= 125 pF, except open-drain outputs. Test conditions for open-drain outputs: C
Rev. 07 — 19 December 2007
Conditions
except pin X1/CLK
pin X1/CLK
I
except open-drain outputs;
I
V
V
V
V
V
V
V
V
CMOS input levels
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
OL
OH
[1]
I
I
I
I
I
I
I
I
all except input port pins
input port pins
operating mode
Power-down mode
= 0 V to V
= 0 V
= V
= 0 V to V
= V
= 0 V
= 0 V
= V
= 2.4 mA
= 400 A
CC
CC
CC
CC
CC
CC
. All time measurements are referenced at input voltages of 0.8 V
CC
CC
0.2 V and V
when the input pins are at V
[2]
[3]
[4]
SS
Min
-
2.4
0.8V
-
V
0.5
0
-
-
-
-
+ 0.2 V.
130
0.5
8
0.5
0.5
CC
CC
0.5 -
L
Typ
-
1.5
2.4
0.2
0.05
-
-
+0.05
+0.05
-
-
-
-
7
1
= 125 pF,
SC28L92
© NXP B.V. 2007. All rights reserved.
SS
. Input port pins at
Max
0.8
-
-
0.4
-
0.5
0
130
+0.5
+0.5
0.5
-
-
0.5
25
5
51 of 73
Unit
V
V
V
V
V
mA
A
A
A
A
A
A
A
A
A
A

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