PIC16F1826-I/MQ Microchip Technology, PIC16F1826-I/MQ Datasheet - Page 136

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PIC16F1826-I/MQ

Manufacturer Part Number
PIC16F1826-I/MQ
Description
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC16F1826-I/MQ

Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
2kWords
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF1826/27
REGISTER 14-1:
TABLE 14-1:
DS41391B-page 136
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5-4
bit 3-2
bit 1-0
Note 1:
FVRCON
Legend:
R/W-0/0
FVREN
Name
2:
FVRRDY is always ‘1’ on devices with the LDO (PIC16F1826/27).
Fixed Voltage Reference output cannot exceed V
Shaded cells are unused by the FVR module.
FVREN: Fixed Voltage Reference Enable bit
0 = Fixed Voltage Reference is disabled
1 = Fixed Voltage Reference is enabled
FVRRDY: Fixed Voltage Reference Ready Flag bit
0 = Fixed Voltage Reference output is not ready or not enabled
1 = Fixed Voltage Reference output is ready for use
Reserved: Read as ‘0’. Maintain these bits clear.
CDAFVR<1:0>: Comparator and DAC Fixed Voltage Reference Selection bit
00 = Comparator and DAC Fixed Voltage Reference Peripheral output is off.
01 = Comparator and DAC Fixed Voltage Reference Peripheral output is 1x (1.024V)
10 = Comparator and DAC Fixed Voltage Reference Peripheral output is 2x (2.048V)
11 = Comparator and DAC Fixed Voltage Reference Peripheral output is 4x (4.096V)
ADFVR<1:0>: ADC Fixed Voltage Reference Selection bit
00 = ADC Fixed Voltage Reference Peripheral output is off.
01 = ADC Fixed Voltage Reference Peripheral output is 1x (1.024V)
10 = ADC Fixed Voltage Reference Peripheral output is 2x (2.048V)
11 = ADC Fixed Voltage Reference Peripheral output is 4x (4.096V)
FVREN
FVRRDY
SUMMARY OF REGISTERS ASSOCIATED WITH THE FVR MODULE
Bit 7
R-q/q
FVRCON: FIXED VOLTAGE REFERENCE CONTROL REGISTER
(1)
FVRRDY
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
Reserved
R/W-0/0
Reserved
Bit 5
Reserved
R/W-0/0
Reserved
Preliminary
Bit 4
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
CDAFVR1
DD
CDAFVR1
R/W-0/0
.
Bit 3
(1)
CDAFVR0
CDAFVR0
Bit 2
R/W-0/0
(2)
(2)
ADFVR1
Bit 1
© 2009 Microchip Technology Inc.
ADFVR1
R/W-0/0
ADFVR0
Bit 0
(2)
(2)
ADFVR0
R/W-0/0
Register
on page
136
bit 0

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