PIC16F1826-I/MQ Microchip Technology, PIC16F1826-I/MQ Datasheet - Page 170

• Manufacturer Part Number: PIC16F1826-I/MQ
• Description: IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
• Manufacturer: Microchip Technology

Specifications of PIC16F1826-I/MQ

• Controller Family/series: PIC16F
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 2kWords
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F/LF1826/27
REGISTER 18-2:
DS41391B-page 170
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0/0
SRSPE
SRSPE: SR Latch Peripheral Set Enable bit
1 = SR Latch is set when the SRI pin is high
0 = SRI pin has no effect on the set input of the SR Latch
SRSCKE: SR Latch Set Clock Enable bit
1 = Set input of SR Latch is pulsed with SRCLK
0 = SRCLK has no effect on the set input of the SR Latch
SRSC2E: SR Latch C2 Set Enable bit
1 = SR Latch is set when the C2 Comparator output is high
0 = C2 Comparator output has no effect on the set input of the SR Latch
SRSC1E: SR Latch C1 Set Enable bit
1 = SR Latch is set when the C1 Comparator output is high
0 = C1 Comparator output has no effect on the set input of the SR Latch
SRRPE: SR Latch Peripheral Reset Enable bit
1 = SR Latch is reset when the SRI pin is high
0 = SRI pin has no effect on the reset input of the SR Latch
SRRCKE: SR Latch Reset Clock Enable bit
1 = Reset input of SR Latch is pulsed with SRCLK
0 = SRCLK has no effect on the reset input of the SR Latch
SRRC2E: SR Latch C2 Reset Enable bit
1 = SR Latch is reset when the C2 Comparator output is high
0 = C2 Comparator output has no effect on the reset input of the SR Latch
SRRC1E: SR Latch C1 Reset Enable bit
1 = SR Latch is reset when the C1 Comparator output is high
0 = C1 Comparator output has no effect on the reset input of the SR Latch
SRSCKE
R/W-0/0
SRCON1: SR LATCH CONTROL 1 REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
SRSC2E
R/W-0/0
SRSC1E
R/W-0/0
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
SRRPE
SRRCKE
R/W-0/0
© 2009 Microchip Technology Inc.
SRRC2E
R/W-0/0
SRRC1E
R/W-0/0
bit 0