PIC16F1826-I/MQ Microchip Technology, PIC16F1826-I/MQ Datasheet - Page 331

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PIC16F1826-I/MQ

Manufacturer Part Number
PIC16F1826-I/MQ
Description
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC16F1826-I/MQ

Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
2kWords
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
LSLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
LSRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
© 2009 Microchip Technology Inc.
Logical Left Shift
[ label ] LSLF
0 ≤ f ≤ 127
d ∈ [0,1]
(f<7>) → C
(f<6:0>) → dest<7:1>
0 → dest<0>
C, Z
The contents of register ‘f’ are shifted
one bit to the left through the Carry flag.
A ‘0’ is shifted into the LSb. If ‘d’ is ‘0’,
the result is placed in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
Logical Right Shift
[ label ] LSLF
0 ≤ f ≤ 127
d ∈ [0,1]
0 → dest<7>
(f<7:1>) → dest<6:0>,
(f<0>) → C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. A ‘0’ is shifted into the MSb. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
0
C
register f
f {,d}
f {,d}
register f
C
Preliminary
0
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
PIC16F/LF1826/27
Move f
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(f) → (dest)
Z
The contents of register f is moved to
a destination dependent upon the
status of d. If d = 0,
destination is W register. If d = 1, the
destination is file register f itself. d = 1
is useful to test a file register since
status flag Z is affected.
1
1
After Instruction
MOVF
W =
Z
MOVF f,d
=
FSR, 0
value in FSR register
1
DS41391B-page 331

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