PIC16F1826-I/MQ Microchip Technology, PIC16F1826-I/MQ Datasheet - Page 173

• Manufacturer Part Number: PIC16F1826-I/MQ
• Description: IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
• Manufacturer: Microchip Technology

Specifications of PIC16F1826-I/MQ

• Controller Family/series: PIC16F
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 2kWords
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.0
The Timer0 module is an 8-bit timer/counter with the
following features:
• 8-bit timer/counter register (TMR0)
• 8-bit prescaler (independent of Watchdog Timer)
• Programmable internal or external clock source
• Programmable external clock edge selection
• Interrupt on overflow
• TMR0 can be used to gate Timer1
Figure 19-1 is a block diagram of the Timer0 module.
19.1
The Timer0 module can be used as either an 8-bit timer
or an 8-bit counter.
19.1.1
The Timer0 module will increment every instruction
cycle, if used without a prescaler. 8-Bit Timer mode is
selected by clearing the TMR0CS bit of the OPTION
register.
FIGURE 19-1:
© 2009 Microchip Technology Inc.
From CPSCLK
T0CKI
F
OSC
TIMER0 MODULE
Timer0 Operation
/4
8-BIT TIMER MODE
T0XCS
0
1
TMR0SE
BLOCK DIAGRAM OF THE TIMER0
TMR0CS
0
1
Preliminary
Prescaler
8-bit
8
PS<2:0>
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
19.1.2
In 8-Bit Counter mode, the Timer0 module will increment
on every rising or falling edge of the T0CKI pin or the
Capacitive Sensing Oscillator (CPSCLK) signal.
8-Bit Counter mode using the T0CKI pin is selected by
setting the TMR0CS bit in the OPTION register to ‘1’
and resetting the T0XCS bit in the CPSCON0 register to
‘0’.
8-Bit Counter mode using the Capacitive Sensing
Oscillator (CPSCLK) signal is selected by setting the
TMR0CS bit in the OPTION register to ‘1’ and setting
the T0XCS bit in the CPSCON0 register to ‘1’.
The rising or falling transition of the incrementing edge
for either input source is determined by the TMR0SE bit
in the OPTION register.
Note:
PIC16F/LF1826/27
The value written to the TMR0 register can
be adjusted, in order to account for the two
instruction cycle delay when TMR0 is
written.
8-BIT COUNTER MODE
PSA
1
0
2 T
Sync
CY
Set Flag bit TMR0IF
Overflow to Timer1
DS41391B-page 173
on Overflow
Data Bus
8
TMR0