PIC16LF819T-I/SSTSL Microchip Technology, PIC16LF819T-I/SSTSL Datasheet - Page 141

• Manufacturer Part Number: PIC16LF819T-I/SSTSL
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF819T-I/SSTSL

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC16LF819TISSTSL

REGISTER 14-5:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1-0
Note 1:
UOWN
R/W-x
2:
3:
(1)
This bit must be initialized by the user to the desired value prior to enabling the USB module.
This bit is ignored unless DTSEN = 1.
If these bits are set, USB communication may not work. Hence, these bits should always be maintained
as ‘0’.
UOWN: USB Own bit
0 = The microcontroller core owns the BD and its corresponding buffer
DTS: Data Toggle Synchronization bit
1 = Data 1 packet
0 = Data 0 packet
Reserved: These bits should always be programmed to ‘0’
DTSEN: Data Toggle Synchronization Enable bit
1 = Data toggle synchronization is enabled; data packets with incorrect Sync value will be ignored
0 = No data toggle synchronization is performed
BSTALL: Buffer Stall Enable bit
1 = Buffer stall enabled; STALL handshake issued if a token is received that would use the BD in the
0 = Buffer stall disabled
BC9:BC8: Byte Count 9 and 8 bits
The byte count bits represent the number of bytes that will be transmitted for an IN token or received
during an OUT token. Together with BC<7:0>, the valid byte counts are 0-1023.
DTS
R/W-x
except for a SETUP transaction, which is accepted even if the data toggle bits do not match.
given location (UOWN bit remains set, BD value is unchanged)
BDnSTAT: BUFFER DESCRIPTOR n STATUS REGISTER (BD0STAT THROUGH
BD63STAT), CPU MODE (DATA IS WRITTEN TO THE SIDE)
(2)
W = Writable bit
‘1’ = Bit is set
R/W-x
—
(3)
(1)
R/W-x
—
(3)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DTSEN
R/W-x
PIC18F2450/4450
(3)
BSTALL
R/W-x
x = Bit is unknown
R/W-x
BC9
DS39760D-page 139
R/W-x
BC8
bit 0