IP-POSPHY4 Altera, IP-POSPHY4 Datasheet - Page 7

IP CORE - POS-PHY Level 4 SPI 4.2 Interface

IP-POSPHY4

Manufacturer Part Number
IP-POSPHY4
Description
IP CORE - POS-PHY Level 4 SPI 4.2 Interface
Manufacturer
Altera
Type
MegaCorer
Datasheet

Specifications of IP-POSPHY4

Software Application
IP CORE, Interface And Protocols, COMMUNICATION
Supported Families
Arria GX, Cyclone, HardCopy, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
POS-PHY Level 4 Interface, Link-Layer/PHY Layer
License
Initial License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Release Information
Device Family Support
Table 1–2. Altera IP Core Device Support Levels
December 2010 Altera Corporation
Preliminary—The core is verified with preliminary timing
models for this device family. The core meets all
functional requirements, but might still be undergoing
timing analysis for the device family. It can be used in
production designs with caution.
Final—The core is verified with final timing models for
this device family. The core meets all functional and
timing requirements for the device family and can be used
in production designs.
f
FPGA Device Families
The POS-PHY Level 4 MegaCore function performs high-speed cell and packet
transfers between physical and link-layer devices.
Table 1–1
MegaCore
Table 1–1. POS-PHY Level 4 MegaCore Function Release Information
For more information about this release, refer to the
and
Altera verifies that the current version of the Quartus
previous version of each MegaCore function. The
and Errata
compilation with MegaCore function versions older than one release.
MegaCore functions can provide the types of support for target Altera device families
described in
Version
Release Date
Ordering Code
Product ID
Vendor ID
Errata.
provides information about this release of the Altera
®
report any exceptions to this verification. Altera does not verify
function.
Table
Item
1–2.
HardCopy Companion—The core is verified with preliminary
timing models for the HardCopy companion device. The core
meets all functional requirements, but might still be undergoing
timing analysis for HardCopy device family. It can be used in
production designs with caution.
HardCopy Compilation—The core is verified with final timing
models for the HardCopy device family. The core meets all
functional and timing requirements for the device family and
can be used in production designs.
1. About This MegaCore Function
HardCopy Device Families
MegaCore IP Library Release Notes
POS-PHY Level 4 MegaCore Function User Guide
MegaCore IP Library Release Notes
®
II software compiles the
December 2010
IP-POSPHY4
Description
0088
6AF7
10.1
®
POS-PHY Level 4

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