IPR-SDRAM/HPDDR Altera, IPR-SDRAM/HPDDR Datasheet - Page 22
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IPR-SDRAM/HPDDR
Manufacturer Part Number
IPR-SDRAM/HPDDR
Description
IP CORE Renewal Of IP-SDRAM/HPDDR
Manufacturer
Altera
Datasheet
1.IP-SDRAMHPDDR.pdf
(88 pages)
Specifications of IPR-SDRAM/HPDDR
Software Application
IP CORE, Memory Controllers, SDRAM
Supported Families
Stratix FPGAs, Quartus II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
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2–10
Table 2–4. Files to Compile—VHDL IP Functional Simulation Models (Part 1 of 2)
DDR and DDR2 SDRAM High-Performance Controller User Guide
Library
altera_mf
lpm
sgate
<device name>
altera
ALTGXB
<device name>_hssi
(1)
(1)
2. Launch your simulation tool from this directory and create the following libraries:
3. Compile the files into the appropriate library (AFI mode) as shown in
■
■
■
■
■
■
■
■
The files are in VHDL93 format.
File Name
<QUARTUS ROOTDIR>/eda/sim_lib/altera_mf_components.vhd
<QUARTUS ROOTDIR>/eda/sim_lib/altera_mf.vhd
/eda/sim_lib/220pack.vhd
/eda/sim_lib/220model.vhd
eda/sim_lib/sgate_pack.vhd
eda/sim_lib/sgate.vhd
eda/sim_lib/<device name>_atoms.vhd
eda/sim_lib/<device name>_ components.vhd
eda/sim_lib/<device name>_hssi_atoms.vhd
eda/sim_lib/altera_primitives_components.vhd
eda/sim_lib/altera_syn_attributes.vhd
eda/sim_lib/altera_primitives.vhd
<device name>_mf.vhd
<device name>_mf_components.vhd
<device name>_hssi_components.vhd
<device name>_hssi_atoms.vhd
altera_mf
lpm
sgate
<device name>
altera
ALTGXB
<device name>_hssi
auk_ddr_hp_user_lib
(1)
© March 2009 Altera Corporation
MegaWizard Plug-In Manager Flow
Chapter 2: Getting Started
Table
2–4.
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