VS6624Q0KP STMicroelectronics, VS6624Q0KP Datasheet - Page 23

• Manufacturer Part Number: VS6624Q0KP
• Description: Display Modules & Development Tools CAMERA MODULE SINGLE CHIP 1.3MEGA
• Manufacturer: STMicroelectronics

Specifications of VS6624Q0KP

• Description/function: Camera Module
• Interface Type: Two-Wire Serial
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VL6624/VS6624
YUV 4:0:0
Note:
Figure 7.
The ITU protocol allows the encapsulation of various data formats over the link. The
following data formats are also proposed encapsulated in ITU601-656 protocol:
●
This is done as described in
single byte. Therefore the output PCLK and data rate is halved.
It is possible to reverse the overall bit order of the component through a register
programming.
False synchronization codes are avoided in the LSByte by adding or subtracting a value of
one, dependent on detection of a 0 code or 255 code respectively.
Figure 8.
See
Output formatter control
YUV 4:0:0 - luminance data channel
YUV4:0:0
Y Cb Cr data swapping options register 0x2294 bYuvSetup
YUV 4:0:0 format encapsulated in ITU stream
DEFAULT
EAV Code
F
F
F
F
1
0
1
0
0
0
0
0
Figure 8
for user interface control of output data formats.
0
0
0
0
X
Y
X
Y
1
1
0
0
START OF DIGITAL ACTIVE LINE
D
0
. In this output mode the output data per pixel is a
D
1
1st
Cb
Cr
Y
Y
D
2
in 4-byte data packet
Components order
D
3
D
2nd
4
Cb
Cr
Y
Y
D
5
D
6
D
7
3rd
Cb
Cr
Y
Y
D
8
D
9
..................
..................
Cb
4th
Cr
Y
Y
Output data formats
where:
Pixel
n
= Y
n
[7:0]
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