VS6624Q0KP STMicroelectronics, VS6624Q0KP Datasheet - Page 39

• Manufacturer Part Number: VS6624Q0KP
• Description: Display Modules & Development Tools CAMERA MODULE SINGLE CHIP 1.3MEGA
• Manufacturer: STMicroelectronics

Specifications of VS6624Q0KP

• Description/function: Camera Module
• Interface Type: Two-Wire Serial
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VL6624/VS6624
10.5
10.6
Acknowledge
After every byte transferred the receiver must output an acknowledge bit. To acknowledge
the data byte receiver pulls SDA during the 9th SCL clock cycle generated by the master. If
SDA is not pulled low then the transmitter stops the output of data and releases control of
the bus back to the master so that it can either generate a STOP or a repeated START
condition.
Figure 24. Data acknowledge
Index space
Communication using the serial bus centres around a number of registers internal to the
either the sensor or the co-processor. These registers store sensor status, set-up, exposure
and system information. Most of the registers are read/write allowing the receiving
equipment to change their contents. Others (such as the chip id) are read only.
The internal register locations are organized in a 64k by 8-bit wide space. This space
includes “real” registers, SRAM, ROM and/or micro controller values.
SDA data
output by
transmitter
SCL clock
from master
SDA data
output by
receiver
START Condition
S
1
Clock Pulse for Acknowledge
Host communication - I²C control interface
2
Negative Acknowledge (A)
Acknowledge (A)
8
9
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