VS6624Q0KP STMicroelectronics, VS6624Q0KP Datasheet - Page 37
VS6624Q0KP
Manufacturer Part Number
VS6624Q0KP
Description
Display Modules & Development Tools CAMERA MODULE SINGLE CHIP 1.3MEGA
Manufacturer
STMicroelectronics
Datasheet
1.VS6624Q0KP.pdf
(106 pages)
Specifications of VS6624Q0KP
Description/function
Camera Module
Interface Type
Two-Wire Serial
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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VL6624/VS6624
1.
2.
3.
4.
5.
Repeat 4 and 5 until all the required data has been written or read.
Minimum number of data bytes for a read =1 (Shortest Message length is 2-bytes).
The master outputs a negative acknowledge for the data when reading the last byte of data.
This causes the slave to stop the output of data and allows the master to generate a STOP
condition.
6.
Figure 21. Device addresses
Master generates a START condition to signal the start of new message.
Master outputs, MS bit first, a 7-bit device address of the slave the master is trying to
communicate with followed by a R/W bit.
a)
b)
The addressed slave acknowledges the device address.
Data transmitted on the bus
a)
b)
Data receive acknowledge
a)
b)
Master generates a STOP condition or a repeated START.
Sensor write address 20
Sensor read address 21
R/W = 0 then the master (transmitter) is writing to the slave (receiver).
R/W = 1 the master (receiver) is reading from the slave (transmitter).
When a write is performed then master outputs 8-bits of data on SDA (MS Bit
first).
When a read is performed then slave outputs 8-bits of data on SDA (MS Bit First).
When a write is performed slave acknowledges data.
When a read is performed master acknowledges data.
Sensor address
H
H
0
0
0
0
0
0
Host communication - I²C control interface
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
R/W
0
1
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