LS-X2280-BASE-PC-N Lattice, LS-X2280-BASE-PC-N Datasheet - Page 8

• Manufacturer Part Number: LS-X2280-BASE-PC-N
• Description: MCU, MPU & DSP Development Tools ispLEVER Base MachXO -2280 Std Dev Kit
• Manufacturer: Lattice

Specifications of LS-X2280-BASE-PC-N

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 4. Prototype Grid 1 and 2 Resistor Pad Configuration
The resistor pads are 0603 surface mount form factor. The 0603 resistor in the center has a short-circuit trace
between the resistor pads. This permits the signal to be driven to the prototype area without the addition of a SMT
zero ohm resistor. If a series resistor with a non-zero value is needed, this short-circuit trace can be removed.
The pull-up resistors within this grid can be configured to be pulled to one of the three available voltage rails on the
board. Table 6 shows how the voltage rails are assigned. Refer to the schematic to determine which resistor pads
connect to which MachXO I/O. The schematic also indicates which jumper block controls the pull-up voltage on
each resistor. The schematic is included in Appendix A.
Table 6. Pull-up Voltage Selection
Prototype Grid 3: Just west (left) of the MachXO is a small array of nine test points. The MachXO I/O pin connec-
tions are indicated in the silkscreen marking. For example, the top-left location connects to MachXO pin F5, etc.
These test points are directly connected to the MachXO without any series resistors, and do not have any pull-
up/pull-down resistors attached.
Prototype Grid 4: This grid is located in the south-east part of the board. This grid consists primarily of uncon-
nected, square-plated through holes. The south edge of this grid has a row of through holes connected to ground.
The north edge has a small quantity of through holes connected to the MachXO.
Figure 5 indicates how these test points are connected to the MachXO 256 fpBGA. The LVDS paired test points
connect to a set of 0603 form factor resistors. These resistors permit series and parallel style terminations to be
applied to the MachXO I/O. Note that some of these I/Os may be no-connects on the MachXO device depending
on which MachXO device is populated on the board. Review the schematic and MachXO Family Data Sheet to
determine which are available for use.
Pull-down
Jumper Block
JP10
JP19
From MachXO
1-2: 1.2V
3-4: V
5-6: 3.3V
1-2: 1.2V
3-4: V
5-6: 3.3V
8
Pull-up Voltage
ADJ
ADJ
Pull-up
MachXO Standard Evaluation Board
Short circuit
Revisions 001 & 002 User’s Guide