SIC417CD-T1-E3 Vishay, SIC417CD-T1-E3 Datasheet - Page 10

IC DRIVER MOSF SYNC BUCK 55MLPQ

SIC417CD-T1-E3

Manufacturer Part Number
SIC417CD-T1-E3
Description
IC DRIVER MOSF SYNC BUCK 55MLPQ
Manufacturer
Vishay
Series
microBUCK™r
Datasheet

Specifications of SIC417CD-T1-E3

Topology
Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
Function
Any Function
Number Of Outputs
2
Frequency - Switching
200kHz ~ 1MHz
Voltage/current - Output 1
0.5 V ~ 5.5 V, 10A
Voltage/current - Output 2
0.75 V ~ 5.25 V, 150mA
W/led Driver
No
W/supervisor
No
W/sequencer
No
Voltage - Supply
3 V ~ 28 V
Operating Temperature
-25°C ~ 125°C
Mounting Type
*
Package / Case
*
Output Voltage
0.5 V to 5.5 V
Output Current
10 A
Input Voltage
3 V to 28 V
Switching Frequency
200 KHz to 1 MHz
Mounting Style
SMD/SMT
Duty Cycle (max)
95 %
Primary Input Voltage
28V
No. Of Outputs
1
Voltage Regulator Case Style
MLPQ
No. Of Pins
32
Operating Temperature Range
-25°C To +125°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SIC417CD-T1-E3
Manufacturer:
VISHAY/威世
Quantity:
20 000
SiC417
Vishay Siliconix
Current Limit Protection
The SiC417 features programmable current limit capability,
which is accomplished by using the R
MOSFET for current sensing. The current limit is set by R
resistor. The R
LX pin which is also the drain of the low-side MOSFET.
When the low-side MOSFET is on, an internal ~ 10 µA
current flows from the I
a voltage drop across the resistor. While the low-side
MOSFET is on, the inductor current flows through it and
creates a voltage across the R
MOSFET is negative with respect to ground.
If this MOSFET voltage drop exceeds the voltage across
R
limit will activate. The current limit then keeps the low-side
MOSFET on and will not allow another high-side on-time,
until the current in the low-side MOSFET reduces enough to
bring the I
the inductor valley current at the level shown by I
figure 8.
Setting the valley current limit to 10 A results in a 10 A peak
inductor current plus peak ripple current. In this situation, the
average (load) current through the inductor is 10 A plus
one-half the peak-to-peak ripple current.
The internal 10 µA current source is temperature
compensated at 4100 ppm in order to provide tracking with
the R
equation.
www.vishay.com
10
PSAVE threshold is reached
Smart power save
threshold (550 mV)
ILIM
DL turns on when smart
drive (DH)
threshold
High-side
drive (DL)
Low-side
, the voltage at the I
FB
DS(ON)
V
current flowing into C
OUT
LIM
threshold is reached
Single DH on-time pulse
. The R
DL turns off FB
drifts up to due to leakage
voltage back up to zero. This method regulates
after DL turn-off
ILIM
Figure 8 - Valley Current Limit
Figure 7 - Smart Power-Save
DH and DL off
R
resistor connects from the I
ILIM
ILIM
LIM
value is calculated by the following
OUT
= 735 x I
LIM
pin and the R
Time
pin will be negative and current
DS(ON)
LIM
. The voltage across the
V
and low-side MOSFET
ILIM
OUT
DS(ON)
Normal DL pulse after DH
discharges via inductor
resistor, creating
Normal V
on-time pulse
LIM
of the lower
pin to the
OUT
I
I
I
PEAK
LOAD
LIM
LIM
ripple
ILIM
in
Note that because the low-side MOSFET with low R
used for current sensing, the PCB layout, solder
connections, and PCB connection to the LX node must be
done carefully to obtain good results. Refer to the layout
guidelines for information.
Soft-Start of PWM Regulator
Soft-start is achieved in the PWM regulator by using an
internal voltage ramp as the reference for the FB
Comparator. The voltage ramp is generated using an internal
charge pump which drives the reference from zero to 500 mV
in ~ 1.2 mV increments, using an internal ~ 500 kHz
oscillator. When the ramp voltage reaches 500 mV, the ramp
is ignored and the FB comparator switches over to a fixed
500 mV threshold. During soft-start the output voltage tracks
the internal ramp, which limits the start-up inrush current and
provides a controlled softstart profile for a wide range of
applications. Typical softstart ramp time is 850 µs. During
soft-start the regulator turns off the low-side MOSFET on any
cycle if the inductor current falls to zero. This prevents
negative inductor current, allowing the device to start into a
pre-biased output.
Power Good Output
The power good (P
which requires a pull-up resistor. When the output voltage is
10 % below the nominal voltage, P
held low until the output voltage returns above - 8 % of
nominal. P
allowed to transition high until soft-start is completed (when
V
P
nominal, which is also the over-voltage shutdown threshold
(600 mV). P
when V5V is present.
Output Over-Voltage Protection
Over-voltage protection becomes active as soon as the
device is enabled. The threshold is set at 500 mV + 20 %
(600 mV). When V
high and the low-side MOSFET is turned on. DL remains
high and the controller remains off , until the EN/PSV input is
toggled or V5V is cycled. There is a 5 µs delay built into the
OVP detector to prevent false transitions. P
after an OVP event.
Output Under-Voltage Protection
When V
375 mV) for eight consecutive clock cycles, the switcher is
shut off and the DH and DL drives are pulled low to tristate
the MOSFETs. The controller stays off until EN/PSV is
toggled or V5V is cycled.
V5V UVLO, and POR
Under-voltage lock-out (UVLO) circuitry inhibits switching
and tri-states the DH/DL drivers until V5V rises above 3.9 V.
An internal Power-On Reset (POR) occurs when V5V
exceeds 3.9 V, which resets the fault latch and soft-start
FB
GOOD
reaches 500 mV) and typically 2 ms has passed.
will transition low if the V
FB
GOOD
falls 25 % below its nominal voltage (falls to
GOOD
is held low during start-up and will not be
FB
also pulls low if the EN/PSV pin is low
GOOD
exceeds the OVP threshold, DL latches
) output is an open-drain output
FB
S10-1367-Rev. D, 14-Jun-10
GOOD
Document Number: 69062
pin exceeds + 20 % of
is pulled low. It is
GOOD
is also low
DS(ON)
is

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