SIC417CD-T1-E3 Vishay, SIC417CD-T1-E3 Datasheet - Page 11

• Manufacturer Part Number: SIC417CD-T1-E3
• Description: IC DRIVER MOSF SYNC BUCK 55MLPQ
• Manufacturer: Vishay
• Series: microBUCK™r

Specifications of SIC417CD-T1-E3

• Topology: Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
• Function: Any Function
• Number Of Outputs: 2
• Frequency - Switching: 200kHz ~ 1MHz
• Voltage/current - Output 1: 0.5 V ~ 5.5 V, 10A
• Voltage/current - Output 2: 0.75 V ~ 5.25 V, 150mA
• W/led Driver: No
• W/supervisor: No
• W/sequencer: No
• Voltage - Supply: 3 V ~ 28 V
• Operating Temperature: -25°C ~ 125°C
• Mounting Type: *
• Package / Case: *
• Output Voltage: 0.5 V to 5.5 V
• Output Current: 10 A
• Input Voltage: 3 V to 28 V
• Switching Frequency: 200 KHz to 1 MHz
• Mounting Style: SMD/SMT
• Duty Cycle (max): 95 %
• Primary Input Voltage: 28V
• No. Of Outputs: 1
• Voltage Regulator Case Style: MLPQ
• No. Of Pins: 32
• Operating Temperature Range: -25°C To +125°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

counter to prepare for soft-start. The SiC417 then begins a
soft-start cycle. The PWM will shut off if V5V falls below
3.6 V.
LDO Regulator
The SiC417 features an integrated LDO regulator with a
programmable output voltage from 0.75 V to 5.25 V using
external resistors, when an external supply is used to power
V5V. The feedback pin (FBL) for the LDO is regulated to 750
mV. There is also an enable pin (ENL) for the LDO that
provides independent control. The LDO voltage can also be
used to provide the bias voltage for the switching regulator,
when V
Chip LDO bias section coming up.
The LDO output voltage is set by the following equation.
A minimum capacitance of 1 µF referenced to AGND is
normally required at the output of the LDO for stability. If the
LDO is providing bias power to the device, then a minimum
0.1 µF capacitor referenced to A
minimum 1.0 µF capacitor referenced to P
gate drive pulses. Refer to the layout guideline section.
LDO Start-up
Before start-up, the LDO checks the status of the following
signals to ensure proper operation can be maintained.
1. ENL pin
2. V
3. V
When the ENL pin is high and V
the LDO will begin start-up. During the initial phase, when the
LDO output voltage is near zero, the LDO initiates a
current-limited start-up (typically 85 mA) to charge the output
capacitor. When V
(as sensed at the FBL pin), the LDO current limit is increased
to ~ 200 mA and the LDO output is quickly driven to the
nominal value by the internal LDO regulator.
Document Number: 69062
S10-1367-Rev. D, 14-Jun-10
90 % of V
V
LDO
LDO
IN
input voltage
V
LDO
VLDO
VLDO
output
is tied to V5V. More detail can be found in the On
final
final
V
LDO
Figure 10 - LDO Start-Up
Figure 9 - LDO Start-Up
LDO
= 750 mV x 1+
has reached 90 % of the final value
R
LDO1
R
LDO2
Constant current startup
GND
IN
(
is above the UVLO point,
R
R
LDO1
LDO2
is required along with a
)
Voltage regulating with
~ 200 mA current limit
GND
To FBL pin
to filter the
LDO Switchover Function
The SiC417 includes a switch-over function for the LDO. The
switch-over function is designed to increase efficiency by
using the more efficient dc-to-dc converter to power the LDO
output, avoiding the less efficient LDO regulator when
possible. The switch-over function connects the V
directly to the V
switch-over is complete the LDO is turned off, which results
in a power savings and maximizes efficiency. If the LDO
output is used to bias the SiC417, then after switch-over the
device is self-powered from the switching regulator with the
LDO turned off.
The switch-over logic waits for 32 switching cycles before it
starts the switch-over. There are two methods that determine
the switch-over of V
In the first method, the LDO is already in regulation and the
dc-to-dc converter is later enabled. As soon as the P
output goes high, the 32 cycles are started. The voltages at
the V
voltages are within ± 300 mV of each other, the V
connects to the V
LDO is turned off.
In the second method, the dc-to-dc converter is already
running and the LDO is enabled. In this case the 32 cycles
are started as soon as the LDO reaches 90 % of its final
value. At this time, the V
and if within ± 300 mV the switch-over occurs and the LDO
is turned off.
Benefits of having a switchover circuit
The switchover function is designed to get maximum
efficiency out of the dc-to-dc converter. The efficiency for an
LDO is very low especially for high input voltages. Using the
switchover function we tie any rails connected to V
through a switch directly to V
complete LDO is turned off which saves power. This gives us
the maximum efficiency out of the SiC417.
If the LDO output is used to bias the SiC417, then after
switchover the V
self-powered mode.
Steps to follow when using the on chip LDO to bias the
SiC417:
• Always tie the V5V to V
• Enable the LDO before enabling the switcher
• LDO has a current limit of 85 mA at start-up with 12 V
• The current limit for the LDO goes up to 200 mA once the
Switch-over Limitations on V
Because the internal switch-over circuit always compares
the V
permissible combinations of V
case where V
programmed to 1.8 V. After start-up, the device would
connect V
voltages are within the ± 300 mV switch-over window.
do not connect any load between V
V
the required bias current to the IC.
LDO
OUT
LDO
reaches 90 % of its final values and can easily supply
and V
OUT
and V
OUT
to V
LDO
OUT
OUT
OUT
OUT
LDO
LDO
is programmed to 1.5 V and V
pins at start-up, there are limitations on
pin using an internal switch. When the
self biases the SiC417 and operates in
pins are then compared; if the two
pin using an internal switch, and the
and disable the LDO, since the two
to V
LDO
LDO
OUT
and V
before enabling the LDO
OUT
OUT
.
OUT
Vishay Siliconix
and V
and V
OUT
. Once switchover is
LDO
pins are compared,
LDO
LDO
and ground
www.vishay.com
. Consider the
SiC417
LDO
LDO
LDO
GOOD
IN
LDO
, so
pin
pin
11
is