ISPPAC-CLK5610V-01T48C Lattice, ISPPAC-CLK5610V-01T48C Datasheet - Page 28

Clock Drivers & Distribution 3.3V 10-320MHz

ISPPAC-CLK5610V-01T48C

Manufacturer Part Number
ISPPAC-CLK5610V-01T48C
Description
Clock Drivers & Distribution 3.3V 10-320MHz
Manufacturer
Lattice

Specifications of ISPPAC-CLK5610V-01T48C

Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Maximum Operating Temperature
70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPPAC-CLK5610V-01T48C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Figure 23. Maximum Ambient Temperature vs. Number of Active Output Banks
Figure 23b shows another derating curve, derived under the assumption that the output frequency is 100MHz. For
many applications, 100MHz outputs will be a more realistic scenario. Comparing the maximum temperature limits
of Figure 23b with Figure 23a, one can see that significantly higher operating temperatures are possible in LVC-
MOS 3.3V output mode with more outputs at 100MHz than at 320MHz.
The examples above used LVCMOS 3.3V logic, which represents the maximum power dissipation case at higher
frequencies. For optimal operation at very high frequencies (> 150 MHz) LVDS will often be the best choice from a
signal integrity standpoint. For LVDS-configured outputs, the maximum ICCO current consumption per bank is low
enough that both the ispClock5610 and ispClock5620 can operate all outputs at maximum frequency over their
complete rated temperature range, as shown in Figure 23c.
Note that because of variations in circuit board mounting, construction, and layout, as well as convective and forced
airflow present in a given design, actual die operating temperature is subject to considerable variation from that
which may be theoretically predicted from package characteristics and device power dissipation.
Output Enable Controls
The ispClock5600 family provides the user with several options for enabling and disabling output pins, as well as
suspending the output clock. In addition to providing the user with the ability to reduce the device’s power con-
90
80
70
60
50
40
90
80
70
60
50
40
0
0
(Outputs LVCMOS 3.3V, f
(Outputs LVDS, f
Temperature Derating Curves
Temperature Derating Curves
2
2
# Active Output Banks
# Active Output Banks
4
4
(a)
(c)
OUT
6
6
=320 MHz)
OUT
=320 MHz)
8
8
10
10
28
90
80
70
60
50
40
0
(Outputs LVCMOS 3.3V, f
Temperature Derating Curves
5620 Commercial
5620 Industrial
5610 Commericial
5610 Industrial
ispClock5600 Family Data Sheet
2
# Active Output Banks
4
(b)
6
OUT
=100 MHz)
8
10

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