RFD14N05LSM9A Fairchild Semiconductor, RFD14N05LSM9A Datasheet

MOSFET N-CH 50V 14A TO-252AA

RFD14N05LSM9A

Manufacturer Part Number
RFD14N05LSM9A
Description
MOSFET N-CH 50V 14A TO-252AA
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of RFD14N05LSM9A

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
100 mOhm @ 14A, 5V
Drain To Source Voltage (vdss)
50V
Current - Continuous Drain (id) @ 25° C
14A
Vgs(th) (max) @ Id
2V @ 250µA
Gate Charge (qg) @ Vgs
40nC @ 10V
Input Capacitance (ciss) @ Vds
670pF @ 25V
Power - Max
48W
Mounting Type
Surface Mount
Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.1 Ohms
Drain-source Breakdown Voltage
50 V
Gate-source Breakdown Voltage
+/- 10 V
Continuous Drain Current
14 A
Power Dissipation
48 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
RFD14N05LSM9ATR

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©2010 Fairchild Semiconductor Corporation
14A, 50V, 0.100 Ohm, Logic Level,
N-Channel Power MOSFETs
These are N-channel power MOSFETs manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits, gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers and relay drivers. This performance is accomplished
through a special gate oxide design which provides full rated
conductance at gate bias in the 3V-5V range, thereby
facilitating true on-off power control directly from logic level
(5V) integrated circuits.
Formerly developmental type TA09870.
Ordering Information
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e., RFD14N05LSM9A.
Packaging
RFD14N05L
RFD14N05LSM
PART NUMBER
DRAIN (FLANGE)
TO-251AA
TO-252AA
JEDEC TO-251AA
PACKAGE
Data Sheet
SOURCE
14N05L
14N05L
DRAIN
GATE
BRAND
Features
• 14A, 50V
• r
• Temperature Compensating PSPICE
• Can be Driven Directly from CMOS, NMOS, and
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175
• Related Literature
Symbol
TTL Circuits
- TB334 “Guidelines for Soldering Surface Mount
DS(ON)
Components to PC Boards”
o
RFD14N05L, RFD14N
C Operating Temperature
= 0.100Ω
SOURCE
GATE
JEDEC TO-252AA
G
DRAIN (FLANGE)
D
S
RFD14N05L, RFD14N05LSM Rev. B2
May 2010
®
Model
05LSM

Related parts for RFD14N05LSM9A

RFD14N05LSM9A Summary of contents

Page 1

... PART NUMBER PACKAGE RFD14N05L TO-251AA RFD14N05LSM TO-252AA NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-252AA variant in the tape and reel, i.e., RFD14N05LSM9A. Packaging JEDEC TO-251AA DRAIN (FLANGE) ©2010 Fairchild Semiconductor Corporation RFD14N05L, RFD14N Features • ...

Page 2

... Diode Reverse Recovery Time NOTES: 2. Pulse Test: Pulse Width ≤ 300ms, Duty Cycle ≤ 2%. 3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current Capability Curve (Figure 5). ©2010 Fairchild Semiconductor Corporation Unless Otherwise Specified C ...

Page 3

... FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 100 10 OPERATION IN THIS AREA MAY BE 1 LIMITED BY r DS(ON) 0 DRAIN TO SOURCE VOLTAGE (V) DS FIGURE 4. FORWARD BIAS SAFE OPERATING AREA ©2010 Fairchild Semiconductor Corporation Unless Otherwise Specified 125 150 175 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT ...

Page 4

... GATE TO SOURCE VOLTAGE (V) GS FIGURE 8. TRANSFER CHARACTERISTICS 160 V = 25V 14A 3.57Ω 140 120 100 GATE TO SOURCE RESISTANCE (Ω) GS FIGURE 10. SWITCHING TIME vs GATE RESISTANCE ©2010 Fairchild Semiconductor Corporation Unless Otherwise Specified (Continued +1] DSS 175 C = 15V 4.5 6.0 7.5 FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE t d(OFF ...

Page 5

... DRAIN TO SOURCE VOLTAGE (V) DS FIGURE 14. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE Test Circuits and Waveforms VARY t TO OBTAIN P R REQUIRED PEAK FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT ©2010 Fairchild Semiconductor Corporation Unless Otherwise Specified (Continued) 80 120 160 200 o C) FIGURE 13. NORMALIZED DRAIN TO SOURCE BREAKDOWN C ISS 1MHz ...

Page 6

... Test Circuits and Waveforms FIGURE 18. SWITCHING TIME TEST CIRCUIT G(REF) FIGURE 20. GATE CHARGE TEST CIRCUIT ©2010 Fairchild Semiconductor Corporation (Continued DUT DUT G(REF d(ON 90% 10% 50% PULSE WIDTH FIGURE 19. RESISTIVE SWITCHING WAVEFORMS Q g(TOT g( g(TH) FIGURE 21. GATE CHARGE WAVEFORMS RFD14N05L, RFD14N05LSM Rev. B2 ...

Page 7

... S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.45 VOFF= -2.55) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; authored by William J. Hepp and C. Frank Wheatley. ©2010 Fairchild Semiconductor Corporation DPLCAP 10 RSCL2 ...

Page 8

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. AccuPower™ Auto-SPM™ Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ ...

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