SI5857DU-T1-E3 Vishay, SI5857DU-T1-E3 Datasheet - Page 2

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SI5857DU-T1-E3

Manufacturer Part Number
SI5857DU-T1-E3
Description
MOSFET P-CH 20V 6A PPAK CHIPFET
Manufacturer
Vishay
Datasheet

Specifications of SI5857DU-T1-E3

Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Diode (Isolated)
Rds On (max) @ Id, Vgs
58 mOhm @ 3.6A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
6A
Vgs(th) (max) @ Id
1.5V @ 250µA
Gate Charge (qg) @ Vgs
17nC @ 10V
Input Capacitance (ciss) @ Vds
480pF @ 10V
Power - Max
10.4W
Mounting Type
Surface Mount
Package / Case
PowerPAK® ChipFet Dual
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SI5857DU-T1-E3TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5857DU-T1-E3
Manufacturer:
VISHAY/威世
Quantity:
20 000
Si5857DU
Vishay Siliconix
Notes:
a. Package limited.
b. Surface Mounted on FR4 Board.
c. t ≤ 5 sec.
d. See Solder Profile
posed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection. Rework Conditions: manual soldering with a soldering iron is not rec-
ommended for leadless components.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under Steady State conditions for MOSFETS is 105 °C/W.
g. Maximum under Steady State conditions for Schottky is 110 °C/W.
www.vishay.com
2
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient (MOSFET)
Maximum Junction-to-Case (Drain) (MOSFET)
Maximum Junction-to-Ambient (Schottky)
Maximum Junction-to-Case (Drain) (Schottky)
SPECIFICATIONS T
Parameter
Static
Drain-Source Breakdown Voltage
V
V
Gate-Source Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
DS
GS(th)
Temperature Coefficient
Temperature Coefficient
b
(http://www.vishay.com/doc?73257).
a
a
J
= 25 °C, unless otherwise noted
a
ΔV
b, g
Symbol
ΔV
b, f
V
r
GS(th)/TJ
I
DS(on)
t
t
t
t
I
I
C
V
C
GS(th)
D(on)
C
Q
Q
d(on)
d(off)
d(on)
d(off)
GSS
DSS
g
Q
R
DS/TJ
DS
oss
t
t
t
t
rss
iss
fs
gs
gd
r
r
f
f
g
g
The PowerPAK ChipFET is a leadless package. The end of the lead terminal is ex-
V
V
V
I
V
I
DS
D
DS
D
DS
DS
≅ - 4 A, V
≅ - 4 A, V
= - 10 V, V
= - 10 V, V
= - 20 V, V
V
V
V
= - 10 V, V
V
V
V
V
V
V
V
DS
GS
DS
DS
GS
DS
DD
DD
DS
GS
Test Conditions
≤ - 5 V, V
= V
= - 4.5 V, I
= - 10 V, I
= 0 V, V
= - 10 V, R
= - 10 V, R
= 0 V, I
= - 20 V, V
Symbol
= - 2.5 V, I
I
D
R
R
R
R
GEN
GEN
f = 1 MHz
GS
thJA
thJC
thJA
thJC
= - 250 µA
GS
GS
GS
GS
, I
= - 4.5 V, R
= - 10 V, R
D
= - 4.5 V, I
D
= - 10 V, I
GS
= 0 V, T
GS
= 0 V, f = 1 MHz
= - 250 µA
= - 250 µA
D
D
D
L
L
GS
= ± 12 V
= - 3.6 A
= - 3.6 A
= - 4.5 V
= 2.5 Ω
= 2.5 Ω
= - 1 A
= 0 V
J
D
= 55 °C
D
g
g
= - 5 A
= 1 Ω
= - 5 A
= 1 Ω
Typical
9.5
43
49
13
- 0.6
Min
- 20
- 20
Maximum
0.048
0.081
S-62480-Rev. B, 04-Dec-06
Typ
- 19
480
125
2.6
5.5
1.2
1.8
10
90
11
11
42
33
50
15
25
10
55
12
61
16
Document Number: 73696
9
5
± 100
0.058
0.100
- 1.5
Max
- 10
8.5
- 1
17
20
65
50
75
10
25
40
20
°C/W
Unit
mV/°C
Unit
nC
µA
pF
ns
ns
V
V
A
Ω
S
Ω

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