SI5326C-C-GM Silicon Laboratories Inc, SI5326C-C-GM Datasheet - Page 62

DSPLL 36-Pin QFN EP

SI5326C-C-GM

Manufacturer Part Number
SI5326C-C-GM
Description
DSPLL 36-Pin QFN EP
Manufacturer
Silicon Laboratories Inc
Type
Jitter Attenuatorr
Datasheet

Specifications of SI5326C-C-GM

Package
36QFN EP
Operating Temperature
-40 to 85 °C
Pll
Yes
Input
Clock
Output
CML, CMOS, LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
346MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
1.71 V ~ 3.63 V
Mounting Type
Surface Mount
Package / Case
36-QFN
Frequency-max
346MHz
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
QFN EP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1746
336-1746-5
336-1746

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5326C-C-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
SI5326C-C-GMR
Quantity:
1 507
Si5326
62
Note: Internal register names are indicated by underlined italics, e.g., INT_PIN. See Section “5.Register Map”.
GND PAD
Pin #
29
28
34
35
36
CKOUT1+
CKOUT2+
Pin Name
CKOUT1–
CKOUT2–
CMODE
GND
GND
I/O
O
O
I
Signal Level
LVCMOS
Supply
Multi
Multi
Output Clock 1.
Differential output clock with a frequency range of 2 kHz to 1.4 GHz.
Output signal format is selected by SFOUT1_REG register bits. Out-
put is differential for LVPECL, LVDS, and CML compatible modes.
For CMOS format, both output pins drive identical single-ended
clock outputs.
Output Clock 2.
Differential output clock with a frequency range of 2 kHz to 1.4 GHz.
Output signal format is selected by SFOUT2_REG register bits. Out-
put is differential for LVPECL, LVDS, and CML compatible modes.
For CMOS format, both output pins drive identical single-ended
clock outputs.
Control Mode.
Selects I
0 = I
1 = SPI Control Mode
This pin must not be NC. Tie either high or low.
See the Si53xx Family Reference Manual for details on I
operation.
Ground Pad.
The ground pad must provide a low thermal and electrical
impedance to a ground plane.
2
C Control Mode
Rev. 1.0
2
C or SPI control mode for the Si5326.
Description
2
C or SPI

Related parts for SI5326C-C-GM