MT46H16M16LFBF-6:H Micron Technology Inc, MT46H16M16LFBF-6:H Datasheet - Page 53

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MT46H16M16LFBF-6:H

Manufacturer Part Number
MT46H16M16LFBF-6:H
Description
DRAM Chip DDR SDRAM 256M-Bit 16Mx16 1.8V 60-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Series
-r

Specifications of MT46H16M16LFBF-6:H

Package
60VFBGA
Density
256 Mb
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Clock Rate
166 MHz
Maximum Random Access Time
6.5|5 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (16Mx16)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Package / Case
60-VFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H16M16LFBF-6:H
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Company:
Part Number:
MT46H16M16LFBF-6:H
Quantity:
568
Part Number:
MT46H16M16LFBF-6:H TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Extended Mode Register
Figure 19: Extended Mode Register
Temperature-Compensated Self Refresh
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
En + 2
0
0
1
1
En + 1
0
1
0
1
En
0
...
0
Mode Register Definition
Standard mode register
Status register
Extended mode register
Reserved
Notes:
E10
0
E9
The EMR controls additional functions beyond those set by the mode registers. These
additional functions include drive strength, TCSR, and PASR.
The EMR is programmed via the LOAD MODE REGISTER command with BA0 = 0 and
BA1 = 1. Information in the EMR will be retained until it is programmed again, the de-
vice goes into deep power-down mode, or the device loses power.
0
This device includes a temperature sensor that is implemented for automatic control of
the self refresh oscillator. Programming the temperature-compensated self refresh
(TCSR) bits will have no effect on the device. The self refresh oscillator will continue to
refresh at the optimal factory-programmed rate for the device temperature.
n + 2
1
1. On-die temperature sensor is used in place of TCSR. Setting these bits will have no effect.
2. The integer n is equal to the most significant address bit.
BA1
E8
0
n + 1
0
BA0
E7–E0
Valid
An
n
...
Operation
Normal AR operation
All other states reserved
...
10
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
E7
9
0
0
0
0
1
1
1
1
E6
8
0
0
1
1
0
0
1
1
53
E5
7
0
1
0
1
0
1
0
1
DS
256Mb: x16, x32 Mobile LPDDR SDRAM
6
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
E2
0
0
0
0
1
1
1
1
TCSR
4
E1
0
0
1
1
0
0
1
1
1
3
E0
0
1
0
1
0
1
0
1
2
Partial-Array Self Refresh Coverage
Full array
1/2 array
1/4 array
Reserved
Reserved
1/8 array
1/16 array
Reserved
PASR
Extended Mode Register
1
0
©2008 Micron Technology, Inc. All rights reserved.
Address bus
Extended mode
register (Ex)

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