MT48LC16M16A2P-7E IT:D Micron Technology Inc, MT48LC16M16A2P-7E IT:D Datasheet - Page 76

• Manufacturer Part Number: MT48LC16M16A2P-7E IT:D
• Description: DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II Tray
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC16M16A2P-7E IT:D

• Density: 256 Mb
• Maximum Clock Rate: 143 MHz
• Package: 54TSOP-II
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 5.4 ns
• Operating Temperature: -40 to 85 °C
• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 54-TSOP II
• Organization: 16Mx16
• Address Bus: 15b
• Access Time (max): 5.4ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 135mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 45: WRITE With Auto Precharge Interrupted by a READ
Figure 46: WRITE With Auto Precharge Interrupted by a WRITE
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Internal
States
Internal
States
Command
Command
Note:
Note:
Address
Address
Bank m
Bank m
Bank n
Bank n
CLK
CLK
DQ
DQ
1. DQM is LOW.
1. DQM is LOW.
Page active
Page active
NOP
T0
T0
NOP
WRITE - AP
WRITE - AP
Page active
Bank n,
Page active
Bank n,
Bank n
Bank n
Col a
T1
D
T1
Col a
D
IN
IN
WRITE with burst of 4
WRITE with burst of 4
T2
T2
NOP
D
NOP
D
IN
IN
76
READ - AP
Bank m,
T3
T3
Col d
Bank m
D
NOP
IN
Interrupt burst, write-back
t
WR - bank n
READ with burst of 4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
WRITE - AP
Bank m,
Col d
T4
Bank m
T4
D
NOP
CL = 3 (bank m)
t
Interrupt burst, write-back
WR - bank n
IN
WRITE with burst of 4
T5
T5
NOP
NOP
D
256Mb: x4, x8, x16 SDRAM
t
IN
Precharge
RP - bank n
PRECHARGE Operation
T6
T6
NOP
D
NOP
D
OUT
t RP - bank n
Precharge
IN
© 1999 Micron Technology, Inc. All rights reserved.
Don’t Care
Don’t Care
T7
T7
D
NOP
NOP
D
t WR - bank m
OUT
t RP - bank m
IN
Write-back