MT48LC8M16A2B4-75:G TR Micron Technology Inc, MT48LC8M16A2B4-75:G TR Datasheet - Page 47
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MT48LC8M16A2B4-75:G TR
Manufacturer Part Number
MT48LC8M16A2B4-75:G TR
Description
DRAM Chip SDRAM 128M-Bit 8Mx16 3.3V 54-Pin VFBGA T/R
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC8M16A2P-75G_TR.pdf
(74 pages)
Specifications of MT48LC8M16A2B4-75:G TR
Density
128 Mb
Maximum Clock Rate
133 MHz
Package
54VFBGA
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
6|5.4 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
128M (8Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
54-VFBGA
Organization
8Mx16
Address Bus
14b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 12:
Table 13:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
Parameter
Die Revision
Operating case temperature:
Commercial
Industrial
Automotive
Junction temperature:
Commercial
Industrial
Automotive
Ambient temperature:
Commercial
Industrial
Automotive
Peak reflow temperature
G
Temperature Limits
Thermal Impedance Simulated Values
Package
Notes:
Notes:
54-ball
VFBGA
60-ball
54-pin
FBGA
TSOP
1. MAX operating case temperature, T
2. Device functionality is not guaranteed if the device exceeds maximum T
3. All temperature specifications must be satisfied
4. The case temperature should be measured by gluing a thermocouple to the top center of
5. Operating ambient temperature surrounding the package.
1. For designs expected to last beyond the die revision listed, contact Micron Applications
2. Thermal resistance data is sampled from multiple lots, and the values should be viewed as
3. These are estimates; actual results may vary.
Substrate
side of the device, as shown in Figure 34, Figure 35, and Figure 36 on page 48.
the component. This should be done with a 1mm bead of conductive epoxy, as defined by
the JEDEC EIA/JESD51 standards. Care should be taken to ensure the thermocouple bead is
touching the case.
Engineering to confirm thermal impedance values.
typical.
2-layer
4-layer
2-layer
4-layer
2-layer
4-layer
θ JA (°C/W)
Airflow =
0m/s
86.2
58.9
72.1
54.5
70.9
54.6
47
θ JA (°C/W)
Airflow =
1m/s
67.8
50.7
57.3
46.6
56.8
47.3
Symbol
C
T
is measured in the center of the package on the top
PEAK
T
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T
T
A
C
J
θ JA (°C/W)
Airflow =
2m/s
Min
47.6
50.6
42.8
50.3
43.5
–40
–40
–40
–40
–40
–40
62
0
0
0
–
128Mb: x4, x8, x16 SDRAM
Electrical Specifications
Max
105
110
105
260
80
90
85
95
70
85
θ JB (°C/W)
©1999 Micron Technology, Inc. All rights reserved.
46.9
41.5
35.5
36.3
36.3
36
Units
C
°C
°C
°C
°C
during operation.
θ JC (°C/W)
11.3
1, 2, 3, 4
4.1
1.9
Notes
3, 5
3