MT48LC8M16A2B4-75:G TR Micron Technology Inc, MT48LC8M16A2B4-75:G TR Datasheet - Page 56
![DRAM Chip SDRAM 128M-Bit 8Mx16 3.3V 54-Pin VFBGA T/R](/photos/7/22/72286/557-54-fbga_sml.jpg)
MT48LC8M16A2B4-75:G TR
Manufacturer Part Number
MT48LC8M16A2B4-75:G TR
Description
DRAM Chip SDRAM 128M-Bit 8Mx16 3.3V 54-Pin VFBGA T/R
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC8M16A2P-75G_TR.pdf
(74 pages)
Specifications of MT48LC8M16A2B4-75:G TR
Density
128 Mb
Maximum Clock Rate
133 MHz
Package
54VFBGA
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
6|5.4 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
128M (8Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
54-VFBGA
Organization
8Mx16
Address Bus
14b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 40:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
COMMAND
A0–A9, A11
DQM /
BA0, BA1
CLK
CKE
A10
DQ
Auto Refresh Mode
Precharge all
High-Z
active banks
t CKS
t CMS
t AS
SINGLE BANK
ALL BANKS
PRECHARGE
Notes:
BANK(S)
T0
t AH
t CKH
t CMH
t CK
1. Each AUTO REFRESH command performs a refresh cycle. Back-to-back commands are not
required.
t RP
T1
NOP
T2
REFRESH
AUTO
t CH
t RFC
56
1
NOP
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CL
Tn + 1
REFRESH
AUTO
128Mb: x4, x8, x16 SDRAM
t RFC
NOP
1
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©1999 Micron Technology, Inc. All rights reserved.
NOP
Timing Diagrams
To + 1
ACTIVE
ROW
ROW
BANK
DON’T CARE