QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 143

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QT2032-EKG-1A2

Manufacturer Part Number
QT2032-EKG-1A2
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of QT2032-EKG-1A2

Lead Free Status / RoHS Status
Supplier Unconfirmed
Revision 5.11
0
1
2
3
4
5
15:6
1. This register bit can be used to enable/disable the WIS in the QT2032. Refer to Section 7, “WAN Interface Sublayer (WIS) Descrip-
0
1
13:2
14
15
15:0
tion (QT2032 Only),” on page 36 for details. This bit is “sticky”; it maintains its value after a soft reset (a reset from an MDIO com-
mand). The default value is restored after a hard reset (applied to RESETN input pin).
Bit
Bit
Bit
WIS Control 2 Register 2.7
Port type selection
1 = Select 10GBASE-W PCS type, default
0 = Select 10GBASE-R PCS type
Transmit test pattern enable (RW)
Receive test pattern enable (RW)
Test pattern select (RW)
1=Square wave test pattern
0=Mixed frequency test pattern
Transmit PRBS31 generator enable (RW)
0 = not enabled, default
1 = enable Tx PRBS31
Receive PRBS31 checker enable (RW)
0 = not enabled, default
1 = enable Rx PRBS31 checker
Reserved (RO)
WIS Status 2 Register 2.8
10GBASE-R ability (RO)
always 1
PRBS31 ability (RO)
always 1
Reserved (RO)
Device present (RO):
always 0
Device present (RO):
always 1
WIS Test Pattern Error Counter Register 2.9
Test pattern error count (RO,NR) count reset on read
LSB is bit 0
MSB is bit 15
1
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(RW)
QT2022/32 - Data Sheet: DS3051
143