QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 57

• Manufacturer Part Number: QT2032-EKG-1A2
• Manufacturer: Applied Micro Circuits Corporation

Specifications of QT2032-EKG-1A2

• Lead Free Status / RoHS Status: Supplier Unconfirmed

8.2.10 XAUI Output Lane Ordering Control Pin (RxXAUI_SEL)
RxXAUI_SEL controls the transmit path XAUI lane ordering as defined at the QT2022/32 pins/balls. The default
setting, RxXAUI_SEL=0, is compatible with XENPAK module requirements.
Table 18: RxXAUI Lane Ordering
8.2.11 EEPROM Write Protect Control Pin (EEPROM_PROT)
When XFP=0, this pin is used to provide write protection for the EEPROM memory space. When the
EEPROM_PROT pin is low, full MDIO write access to MDIO registers 1.8007 - 1.8106h is allowed. When
EEPROM_PROT is high it blocks MDIO writes to the registers corresponding to EEPROM registers 0 to PL and PU
to 255 inclusive thereby preventing changes to these EEPROM registers. When EEPROM_PROT is high, it also
blocks MDIO writes to the DOM register space from 1.9000 - 1.90FFh. I2C write access is also blocked (see
Section 10.8 on page 93). For more information on the function of EEPROM_PROT, see Section 10 on page 79.
When XFP=1, the EEPROM_PROT definition is reassigned to indicate the absence of an XFP module. A high level
indicates the XFP module is absent. When used in an XFP application, this pin should be connected to the XFP
module ‘Mod_ABS’ pin.
The state of the EEPROM_PROT input can be read in Register 1.D002h.
8.2.12 LASI Interrupt Control Pin (LASI_INTB)
The LASI_INTB pin is an interrupt pin for raising a LASI alarm from an external device. This provides a method for
an external device to rapidly trigger the LASI interrupt, such as a DOM. A logical low on this input is a fault
condition.
The LASI_INTB alarm is mapped to the LASI alarm register bit 1.9005h.3. When the LASI_INTB input is asserted
low (alarm condition), Register bit 1.9005h.3 is set to 1. This will cause the LASI output to be asserted.
When XFP=1, LASI_INTB is reassigned to the XFP module interrupt input pin. When used in an XFP application,
this pin should be connected to the XFP module interrupt pin. The alarm behavior is the same in this mode as
when XFP=0. That is, when the LASI_INTB input is asserted low (alarm condition), Register bit 1.9005h.3 is set to
1, causing the LASI output to be asserted.
Revision 5.11
RxXAUI3P
RxXAUI3N
RxXAUI2P
RxXAUI2N
RxXAUI1P
RxXAUI1N
RxXAUI0P
RxXAUI0N
RxXAUI_SEL=0
AppliedMicro - Confidential & Proprietary
Signal
RxXAUI0P
RxXAUI0N
RxXAUI1P
RxXAUI1N
RxXAUI2P
RxXAUI2N
RxXAUI3P
RxXAUI3N
RxXAUI_SEL=1
QT2022/32 - Data Sheet: DS3051
57