LAN9312-NU Standard Microsystems (SMSC), LAN9312-NU Datasheet - Page 419
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LAN9312-NU
Manufacturer Part Number
LAN9312-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NU.pdf
(458 pages)
Specifications of LAN9312-NU
Number Of Primary Switch Ports
2
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9312-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.4.10
BITS
31:5
3:0
4
RESERVED
Random Discard Weight Table RnW
Specifies a read (1) or a write (0) command.
Random Discard Weight Table Index
Specifies the buffer usage range that is accessed.
There are a total of 16 probability entries. Each entry corresponds to a range
of the number of buffers used by the ingress port. The ranges are structured
to give more resolution towards the lower buffer usage end.
Buffer Manager Random Discard Table Command Register (BM_RNDM_DSCRD_TBL_CMD)
This register is used to read and write the Random Discard Weight table. A write to this address
performs the specified access. This table is used to set the packet drop probability verses the buffer
usage.
For a read access, the
(BM_RNDM_DSCRD_TBL_RDATA)
For a write access, the
(BM_RNDM_DSCRD_TBL_WDATA)
VALUES
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
1100
1101
0111
1110
1111
BIT
Register #:
1C09h
DESCRIPTION
Buffer Manager Random Discard Table Read Data Register
Buffer Manager Random Discard Table Write Data Register
DATASHEET
BUFFER USAGE LEVEL
can be read following a write to this register.
should be written before writing this register.
112 to 127
128 to 159
160 to 191
192 to 223
224 to 255
96 to 111
16 to 23
24 to 31
32 to 39
40 to 47
48 to 55
56 to 63
64 to 79
80 to 95
419
8 to 15
0 to 7
Size:
32 bits
TYPE
R/W
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
0b
0h
-
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