82P2821BH IDT, Integrated Device Technology Inc, 82P2821BH Datasheet - Page 79

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82P2821BH

Manufacturer Part Number
82P2821BH
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2821BH

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
GCF - Global Configuration Register
Address: 080H
Type: Read / Write
Default Value: 03H
Programming Information
IDT82P2821
7 - 5
3 - 2
Bit
4
1
0
7
-
INT_PIN[1:0]
TMOV_IM
GLB_IM
Name
COPY
-
6
-
Reserved.
When the per-channel register of one channel is written, this bit determines whether the written value is copied to the same reg-
ister of the other channels simultaneously.
0: Disable. (default)
1: Enable.
These two bits control the output on the INT pin.
X0: Open drain, active low. (default)
01: Push-pull, active low.
11: Push-pull, active high.
This bit is a global configuration interrupt mask bit.
0: The per-channel interrupt will be generated when the per-channel interrupt mask bit is ‘0’ and the corresponding interrupt sta-
tus bit is ‘1’.
1: Mask all the per-channel interrupts. None per-channel interrupts can be generated. (default)
This bit controls whether the interrupt is generated when one second time is over. This one second timer is locked to MCLK.
0: Enable.
1: Mask. (default)
5
-
COPY
4
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
79
INT_PIN1
3
Description
INT_PIN0
2
GLB_IM
1
February 6, 2009
TMOV_IM
0

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