LAN91C111-NU Standard Microsystems (SMSC), LAN91C111-NU Datasheet - Page 43

• Manufacturer Part Number: LAN91C111-NU
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN91C111-NU

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Chapter 8 MAC Data Structures and Registers
SMSC LAN91C111 REV C
8.1
STATUS WORD
BYTE COUNT
DATA AREA
CONTROL BYTE
Frame Format In Buffer Memory
The frame format in memory is similar for the Transmit and Receive areas. The first word is reserved
for the status word. The next word is used to specify the total number of bytes, and it is followed by
the data area. The data area holds the frame itself. By default, the last byte in the receive frame format
is followed by the CRC, and the Control byte follows the CRC.
BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD,
the BYTE COUNT WORD, the DATA AREA, the CRC, and the CONTROL BYTE. The CRC is not
included if the STRIP_CRC bit is set. The maximum number of bytes in a RAM page is 2048 bytes.
2046 Max
(DECIMAL)
OFFSET
RAM
0
2
4
bit15
RESERVED
2nd Byte
CONTROL BYTE
TRANSMIT PACKET
Written by CSMA upon transmit
completion (see Status Register)
Written by CPU
Written/modified by CPU
Written by CPU to control odd/even
data bytes
Last Byte
Figure 8.1 Data Frame Format
DATASHEET
CRC (4 BYTES)
STATUS WORD
DATA AREA
43
BYTE COUNT (always even)
LAST DATA BYTE (if odd)
RECEIVE PACKET
Written by CSMA upon receive
completion (see RX Frame Status
Word)
Written by CSMA
Written by CSMA
Written by CSMA; also has odd/even
bit
1st Byte
Revision 1.91 (06-01-09)
bit0