LAN91C111-NU Standard Microsystems (SMSC), LAN91C111-NU Datasheet - Page 67

• Manufacturer Part Number: LAN91C111-NU
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN91C111-NU

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
SMSC LAN91C111 REV C
8.23
8.24
BYTE
BYTE
BYTE
BYTE
HIGH
HIGH
LOW
LOW
Bank 3 - Management Interface
Bank 3 - Revision Register
MSK_CRS100 - Disables CRS100 detection during transmit in half duplex mode (SWFDUP=0).
MDO - MII Management output. The value of this bit drives the MDO pin.
MDI - MII Management input. The value of the MDI pin is readable using this bit.
MDCLK - MII Management clock. The value of this bit drives the MDCLK pin.
MDOE - MII Management output enable. When high pin MDO is driven, when low pin MDO is tri-
stated.
The purpose of this interface, along with the corresponding pins is to implement MII PHY management
in software.
CHIP - Chip ID. Can be used by software drivers to identify the device used.
REV - Revision ID. Incremented for each revision of a given device.
Reserved
0
1
0
0
OFFSET
OFFSET
A
8
CRS100
MSK_
0
0
0
0
Reserved
REVISION REGISTER
CHIP
MANAGEMENT
Reserved
INTERFACE
NAME
NAME
1
1
1
0
DATASHEET
Reserved
67
1
1
1
1
READ/WRITE
READ ONLY
Reserved
MDOE
TYPE
TYPE
0
0
0
0
Reserved
MCLK
0
0
0
0
SYMBOL
SYMBOL
MGMT
REV
REV
Reserved
MDI Pin
Revision 1.91 (06-01-09)
MDI
1
1
1
Reserved
MDO
1
0
1
0