LAN91C111-NU Standard Microsystems (SMSC), LAN91C111-NU Datasheet - Page 58

• Manufacturer Part Number: LAN91C111-NU
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN91C111-NU

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Revision 1.91 (06-01-09)
8.16
OPERATION
CODE
000
001
010
011
100
101
BYTE
BYTE
HIGH
LOW
Bank 2 - MMU Command Register
This register is used by the CPU to control the memory allocation, de-allocation, TX FIFO and RX
FIFO control.
The three command bits determine the command issued as described below:
COMMAND SET:
DECIMAL
VALUE
0
1
2
3
4
5
OFFSET
0
Operation Code
COMMAND
COMMAND
NOOP - NO OPERATION
ALLOCATE MEMORY FOR TX
RESET MMU TO INITIAL STATE - Frees all memory allocations, clears relevant
interrupts, resets packet FIFO pointers.
REMOVE FRAME FROM TOP OF RX FIFO - To be issued after CPU has
completed processing of present receive frame. This command removes the
receive packet number from the RX FIFO and brings the next receive frame (if
any) to the RX area (output of RX FIFO).
REMOVE AND RELEASE TOP OF RX FIFO - Like 3) but also releases all
memory used by the packet presently at the RX FIFO output. The MMU busy
time after issuing REMOVE and RELEASE command depends on the time when
the busy bit is cleared. The time from issuing REMOVE and RELEASE command
on the last receive packet to the time when receive FIFO is empty depends on
RX INT bit turning low. An alternate approach can be checking the read RX FIFO
register.
RELEASE SPECIFIC PACKET - Frees all pages allocated to the packet specified
in the PACKET NUMBER REGISTER. Should not be used for frames pending
transmission. Typically used to remove transmitted frames, after reading their
completion status. Can be used following 3) to release receive packet memory
in a more flexible way than 4).
MMU COMMAND
REGISTER
NAME
DATASHEET
Reserved
58
WRITE ONLY
READABLE
BUSY BIT
Reserved
TYPE
10/100 Non-PCI Ethernet Single Chip MAC + PHY
Reserved
SYMBOL
MMUCR
Reserved
SMSC LAN91C111 REV C
BUSY
Datasheet
0