AM79C976KI AMD (ADVANCED MICRO DEVICES), AM79C976KI Datasheet - Page 219

• Manufacturer Part Number: AM79C976KI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C976KI

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / RoHS Status: Not Compliant

13-8
7-0
BCR30: Expansion Bus Data Port Register
Bit
31-8
7-0
BCR31: Software Timer Register
Bit
31-16
15-0
9/14/00
RES
EPADDRU
Name
RES
EBDATA
Name
RES
STVAL
Reserved locations. Written as
zeros and read as undefined.
Expansion Port Address Upper.
This upper portion of the Expan-
sion Bus address is used to pro-
vide addresses for Flash/EPROM
port accesses.
Read accessible always; write
accessible only when the STOP
bit is set or when SRAM SIZE
(BCR25, bits 7-0) is 0. EPADD-
RU is undefined after H_RESET
and is unaffected by S_RESET or
the STOP bit.
zeros and read as undefined.
TA is the data port for operations
on the Expansion Port involving
Flash accesses.
Flash read cycles are performed
when BCR30 is read. Upon com-
pletion of the read cycle, the 8-bit
result for Flash access is stored
in EBDATA[7:0]. Flash write cy-
cles are performed when BCR30
is written and the FLASH bit
(BCR29, bit 15) is set to 1.
Read and write accessible. EB-
DATA
H_RESET, and is unaffected by
S_RESET and the STOP bit.
zeros and read as undefined.
controls the maximum time for
the Software Timer to count be-
fore
(CSR7, bit 11) interrupt. The Soft-
ware Timer is a free-running tim-
er that is started upon the first
write to STVAL. After the first
write, the Software Timer will
continually count and set the
Reserved locations. Written as
Expansion Bus Data Port. EBDA-
Reserved locations. Written as
Software Timer Value. STVAL
Description
Description
generating
is
undefined
the
P R E L I M I N A R Y
STINT
after
Am79C976
BCR32: MII Control and Status Register
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16 RES
15
14
Name
ANTST
MIIPD
STINT interrupt at the STVAL pe-
riod.
The STVAL value is interpreted
as an unsigned number with a
resolution of 10.24µs. For in-
stance, if STVAL is set to 48,828
(0BEBCh), the Software Timer
period will be 0.5 s.
Setting STVAL to a value of 0 will
result in erratic behavior.
Read
STVAL is set to FFFFh after
H_RESET and is unaffected by
S_RESET and the STOP bit.
Note: Use of this bit will cause
data corruption and erroneous
operation.
Read/Write accessible. ANTST is
set to 0 by H_RESET and is unaf-
fected by S_RESET and the
STOP bit.
Reserved locations. Written as
zeros and read as undefined.
Reserved
tests. Written as 0 and read as
undefined.
MII PHY Detect. MIIPD reflects
the quiescent state of the MDIO
pin. MIIPD is continuously updat-
ed whenever there is no manage-
ment operation in progress on the
MII interface. When a manage-
ment operation begins on the in-
terface, the state of MIIPD is
preserved until the operation
ends, when the quiescent state is
again monitored and continuous-
ly updates the MIIPD bit. When
the MDIO pin is at a quiescent
LOW state, MIIPD is cleared to 0.
When the MDIO pin is at a quies-
cent HIGH state, MIIPD is set to
1. Any transition on the MIIPD bit
will set the MIIPDTINT bit (CSR7,
bit 1).
Description
and
for
write
manufacturing
accessible.
219