WJLXT972MLC.A4 Q 911 Intel, WJLXT972MLC.A4 Q 911 Datasheet - Page 45

• Manufacturer Part Number: WJLXT972MLC.A4 Q 911
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 Q 911

• Lead Free Status / RoHS Status: Compliant

5.7.3
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Figure 17. Intel
100BASE-X Protocol Sublayer Operations
With respect to the 7-layer communications model, the LXT972M Transceiver is a Physical Layer
1 (PHY) device.
The LXT972M Transceiver implements the following sublayers of the reference model defined by
the IEEE 802.3 standard, and discussed from the reference model point of view:
Figure 17
•
•
•
Section 5.7.3.1, “Physical Coding Sublayer”
Section 5.7.3.2, “Physical Medium Attachment Sublayer”
Section 5.7.3.3, “Twisted-Pair Physical Medium Dependent Sublayer”
Sublayer
Sublayer
Sublayer
®
LXT972M Protocol Sublayers
PMA
PMD
PCS
shows the LXT972M Transceiver protocol sublayers.
Intel® LXT972M
Transceiver
Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Serializer/De-serializer
Link/Carrier Detect
Encoder/Decoder
De-scrambler
Scrambler/
100BASE-TX
MII Interface
B3514-01
45