WJLXT972MLC.A4 Q 911 Intel, WJLXT972MLC.A4 Q 911 Datasheet - Page 72

no-image

WJLXT972MLC.A4 Q 911

Manufacturer Part Number
WJLXT972MLC.A4 Q 911
Description
Manufacturer
Intel
Datasheet

Specifications of WJLXT972MLC.A4 Q 911

Lead Free Status / RoHS Status
Compliant
Intel
72
Figure 30. Intel
Figure 31. Intel
Table 37. Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
MDIO setup before MDC, sourced
by STA
MDIO hold after MDC, sourced by
STA
MDC to MDIO output delay,
sourced by PHY
MDC period
1. Typical values are at 25° C and are for design aid only, not guaranteed, and not subject to production
testing.
®
®
®
LXT972M Transceiver MDIO Timing
LXT972M Transceiver MDIO Input Timing
LXT972M Transceiver MDIO Output Timing
Parameter
MDIO
MDIO
MDC
MDC
Symbol
t1
t2
t3
t4
t3
Min
125
10
5
t4
Typ
t1
1
Max
150
t2
Units
ns
ns
ns
ns
Document Number: 302875-005
Revision Date: 27-Oct-2005
Test Conditions
MDC = 8 MHz
Datasheet

Related parts for WJLXT972MLC.A4 Q 911