WJLXT972MLC.A4 Q 911 Intel, WJLXT972MLC.A4 Q 911 Datasheet - Page 6

• Manufacturer Part Number: WJLXT972MLC.A4 Q 911
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 Q 911

• Lead Free Status / RoHS Status: Compliant

Intel
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LXT972M Single-Port 10/100 Mbps PHY Transceiver
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Digital I/O Characteristics (Except for MII, XI/XO, and LED/CFG Pins) .............. 62
Digital I/O Characteristics
I/O Characteristics - REFCLK/XI and XO Pins.................................................... 63
I/O Characteristics - LED/CFG Pins .................................................................... 63
100BASE-TX Transceiver Characteristics .......................................................... 64
10BASE-T Transceiver Characteristics............................................................... 64
10BASE-T Link Integrity Timing Characteristics ................................................. 64
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Register Set for IEEE Base Registers................................................................. 75
Control Register - Address 0, Hex 0 ................................................................... 76
MII Status Register #1 - Address 1, Hex 1 .......................................................... 77
PHY Identification Register 1 - Address 2, Hex 2 ............................................... 78
PHY Identification Register 2 - Address 3, Hex 3 ............................................... 78
Auto-Negotiation Advertisement Register - Address 4, Hex 4 ............................ 79
Auto-Negotiation Link Partner Base Page Ability Register - Address 5, Hex 5... 80
Auto-Negotiation Expansion - Address 6, Hex 6 ................................................. 81
Auto-Negotiation Next Page Transmit Register - Address 7, Hex 7 ................... 82
Auto-Negotiation Link Partner Next Page Receive Register - Address 8, Hex 8 82
Register Set for Product-Specific Registers ........................................................ 83
Configuration Register - Address 16, Hex 10...................................................... 84
Status Register #2 - Address 17, Hex 11 ............................................................ 85
Status Change Register - Address 19, Hex 13 ................................................... 86
LED Configuration Register - Address 20, Hex 14.............................................. 87
Digital Configuration Register - Address 26, Hex 1A .......................................... 88
Transmit Control Register - Address 30, Hex 1E ................................................ 89
Product Ordering Information .............................................................................. 92
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LXT972M Transceiver 100BASE-TX Receive Timing Parameters ........... 65
LXT972M Transceiver 100BASE-TX Transmit Timing Parameters ......... 66
LXT972M Transceiver 10BASE-T Receive Timing ................................... 67
LXT972M Transceiver 10BASE-T Transmit Timing .................................. 68
LXT972M Transceiver 10BASE-T Jabber and Unjabber Timing............... 69
LXT972M Transceiver 10BASE-T SQE (Heartbeat) Timing ..................... 70
LXT972M Transceiver Auto-Negotiation / Fast Link Pulse Timing ............ 71
LXT972M Transceiver MDIO Timing ......................................................... 72
LXT972M Transceiver Power-Up Timing .................................................. 73
LXT972M Transceiver RESET_L Pulse Width and Recovery Timing ....... 74
Datasheet
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- MII Pins .................................................................. 62
Document Number: 302875-005
Revision Date: 27-Oct-2005