AM79Q02JC AMD (ADVANCED MICRO DEVICES), AM79Q02JC Datasheet - Page 39

• Manufacturer Part Number: AM79Q02JC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79Q02JC

• Lead Free Status / RoHS Status: Supplier Unconfirmed

MPI COMMAND STRUCTURE
This section details each MPI command. Each command is shown along with the format of any additional data bytes
that follow. For details of the filter coefficients of the form C
section on page 56.
Unused bits are indicated by “RSVD”; 0’s should be written to them, but 0’s are not guaranteed when they are read.
*Default field values are marked by an asterisk. A hardware reset forces the default values.
1.
2.
3.
Deactivate (Standby State)
Software Reset
Hardware Reset
(00h)
(02h)
(04h)
In the Deactivated mode:
The action of this command is identical to that of the RST pin except that it only operates on the
channels selected by the Channel Enable Register and it does not change clock slots, time
slots, PCM highways, or global chip parameters. See the note under the hardware reset
command that follows.
Hardware reset is equivalent to pulling the RST on the device Low. This command does not
depend on the state of the Channel Enable Register.
Note: The action of a hardware reset is described in Reset States on page 31 of the section Operating
the QSLAC Device.
Command
Command
Command
All programmed information is retained.
The Microprocessor Interface (MPI) remains active.
The PCM inputs are disabled and the PCM outputs are high impedance unless
signaling on the PCM highway is programmed (SMODE = 1).
The analog output (VOUT) is disabled and biased at 2.1 V.
The channel status (CS) bit in the SLIC I/O Direction and Channel Status Register is
set to 0.
SLAC Products
D
D
D
0
0
0
7
7
7
xy
m
xy
D
D
D
0
0
0
, refer to the General Description of CSD Coefficients
6
6
6
D
D
D
0
0
0
5
5
5
D
D
D
0
0
0
4
4
4
D
D
D
0
0
0
3
3
3
D
D
D
0
0
1
2
2
2
MPI Command
MPI Command
MPI Command
D
D
D
0
1
0
1
1
1
D
D
D
0
0
0
0
0
0
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