82V1671J IDT, Integrated Device Technology Inc, 82V1671J Datasheet - Page 8

• Manufacturer Part Number: 82V1671J
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V1671J

• Number Of Channels: 4
• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: PLCC
• Operating Temperature Classification: Industrial
• Pin Count: 28
• Mounting: Surface Mount
• Operating Current: 95mA
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Lead Free Status / RoHS Status: Not Compliant

RSLIC & CODEC CHIPSET
Table - 1
Table - 2
Table - 3
Table - 4
Table - 5
Table - 6
Table - 7
Table - 8
Table - 9
Table - 10
Table - 11
Table - 12
Table - 13
Table - 14
Table - 15
Table - 16
Table - 17
Table - 18
Table - 19
Table - 20
Table - 21
Table - 22
Table - 23
Table - 24
Table - 25
Table - 26
Table - 27
Table - 28
Registers and Coe-RAM Locations Used for DC Feeding Configuration...........................................................................................19
Registers and Coe-RAM Locations Used for Internal Ringing Mode .................................................................................................24
Registers and Coe-RAM Locations Used for External Ringing Mode ................................................................................................26
Off-hook Detection in Different Modes ...............................................................................................................................................27
Registers and Coe-RAM Locations Used for Off-hook Detection ......................................................................................................28
Registers Used for Ground-key Detection..........................................................................................................................................29
Registers and Coe-RAM Locations Used for Tone Generation .........................................................................................................30
FSK Modulation Characteristics .........................................................................................................................................................31
Registers and FSK-RAM Used for the FSK Generator ......................................................................................................................32
Registers and Coe-RAM Locations Used for UTD .............................................................................................................................36
Conference Mode...............................................................................................................................................................................38
Active PCM Channel Configuration Bits.............................................................................................................................................38
Level Meter Source Selection ............................................................................................................................................................40
Level Meter Result Value Range........................................................................................................................................................43
Shift Factor Selection .........................................................................................................................................................................43
Level Meter Threshold Setting ...........................................................................................................................................................43
Registers and Coe-RAM Locations Used for the Level Meter............................................................................................................44
Registers and Coe-RAM Locations Used for Ramp Generator..........................................................................................................48
Time Slot Selection For Compressed GCI .........................................................................................................................................53
Time Slot Selection For Linear GCI....................................................................................................................................................54
Local Register Addressing in MPI Mode ............................................................................................................................................60
Local Register Addressing in GCI Mode ............................................................................................................................................60
Coefficient RAM Mapping...................................................................................................................................................................62
Global Registers Mapping ..................................................................................................................................................................63
Local Registers Mapping....................................................................................................................................................................64
RSLIC Operating Mode ......................................................................................................................................................................89
Interrupt Source and Interrupt Mask...................................................................................................................................................91
External Components in Application Circuits ...................................................................................................................................105
LIST OF TABLES
8
IDT82V1671/IDT82V1671A, IDT82V1074