PIC18F46K80T-I/ML Microchip Technology, PIC18F46K80T-I/ML Datasheet - Page 177
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18F46K80T-I/ML
Manufacturer Part Number
PIC18F46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11.0
Depending on the device selected and features
enabled, there are up to seven ports available. Some
pins of the I/O ports are multiplexed with an alternate
function from the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Each port has three memory mapped registers for its
operation:
• TRIS register (Data Direction register)
• PORT register (reads the levels on the pins of the
• LAT register (Output Latch register)
Reading the PORT register reads the current status of
the pins, whereas writing to the PORT register, writes
to the Output Latch (LAT) register.
Setting a TRIS bit (= 1 ) makes the corresponding port
pin an input (putting the corresponding output driver in
a High-Impedance mode). Clearing a TRIS bit (= 0 )
makes the corresponding port pin an output (i.e., put
the contents of the corresponding LAT bit on the
selected pin).
The Output Latch (LAT register) is useful for
read-modify-write operations on the value that the I/O
pins are driving. Read-modify-write operations on the
LAT register read and write the latched output value for
the PORT register.
A simplified model of a generic I/O port, without the
interfaces to other peripherals, is shown in
FIGURE 11-1:
2011 Microchip Technology Inc.
device)
Note 1:
RD LAT
Data
Bus
WR LAT
or PORT
WR TRIS
RD TRIS
RD PORT
I/O PORTS
I/O pins have diode protection to V
TRIS Latch
Data Latch
CKx
CKx
D
D
GENERIC I/O PORT
OPERATION
Q
Q
Q
EN
EN
D
DD
and V
Figure
I/O Pin
Input
Buffer
SS
.
11-1.
(1)
Preliminary
PIC18F66K80 FAMILY
11.1
When developing an application, the capabilities of the
port pins must be considered. Outputs on some pins
have higher output drive strength than others. Similarly,
some pins can tolerate higher than V
All of the digital ports are 5.5V input tolerant. The
analog ports have the same tolerance, having clamping
diodes implemented internally.
11.1.1
When used as digital I/O, the output pin drive strengths
vary, according to the pins’ grouping to meet the needs
for a variety of applications. In general, there are two
classes of output pins, in terms of drive capability:
• Outputs designed to drive higher current loads
• Outputs with lower drive levels, but capable of
For more details, see “Absolute Maximum Ratings” in
Section 31.0 “Electrical Characteristics”
11.1.2
Five of the I/O ports (PORTB, PORTD, PORTE,
PORTF and PORTG) implement configurable weak
pull-ups on all pins. These are internal pull-ups that
allow floating digital input signals to be pulled to a
consistent level without the use of external resistors.
The pull-ups are enabled with a single bit for each of the
ports: RBPU (INTCON2<7>) for PORTB, and RDPU,
REPU, RFPU and RGPU (PADCFG1<7:4>) for the
other ports.
Additionally, the PORTB pull-up resistors can be
enabled individually using the WPUB register. Each bit
in the register corresponds to a bit on PORTB.
such as LEDs:
- PORTA
- PORTC
driving normal digital circuit loads with a high input
impedance. Able to drive LEDs, but only those
with smaller current requirements:
- PORTD
- PORTF
Note 1: These ports are not available on 28-pin
I/O Port Pin Capabilities
2: These ports are not available on 28-pin
PIN OUTPUT DRIVE
PULL-UP CONFIGURATION
(2)
(1)
devices.
or 40/44-pin devices
– PORTB
– PORTE
– PORTG
(1)
(2)
DS39977C-page 177
DD
input levels.
.
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