PIC18F46K80T-I/ML Microchip Technology, PIC18F46K80T-I/ML Datasheet - Page 49
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18F46K80T-I/ML
Manufacturer Part Number
PIC18F46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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2.4
On the PIC18F66K80 family devices, the regulator is
enabled and a low-ESR (< 5Ω) capacitor is required on
the V
output voltage. The V
connected to V
connected to ground. The type can be ceramic or
tantalum. Suitable examples of capacitors are shown in
Table
can be used. Designers may use
ESR equivalence of candidate devices.
It is recommended that the trace length not exceed
0.25 inch (6 mm). Refer to
Characteristics”
When the regulator is disabled, a 0.1F capacitor
should be connected from the V
ground. This capacitor’s characteristics must be similar
to those of the “decoupling” capacitors explained in
Section 2.2.1. For details on the V
when the regulator is disabled, see Parameter D001 in
Section 31.0 “Electrical
Some PIC18FXXKXX families or some devices within
a family do not provide the option of enabling or
disabling the on-chip voltage regulator:
• The PIC18LFXXKXX devices permanently
• PIC18FXXKXX devices permanently enable the
For details on all members of the PIC18F66K80 family,
see
2011 Microchip Technology Inc.
disable the voltage regulator.
These devices require a 0.1F capacitor on the
V
devices must comply with the “voltage regulator
disabled” specification for Parameter D001, in
Section 31.0 “Electrical
voltage regulator.
These devices require a 10 F capacitor on the
V
CAP
CAP
Section 28.3 “On-Chip Voltage
CAP
2-1. Capacitors with equivalent specifications
/V
/V
/V
Voltage Regulator Pins
(V
DDCORE
DDCORE
DDCORE
CAP
DD
/V
for additional information.
pin.
and must use a capacitor of 10 μF
DDCORE
pin to stabilize the voltage regulator
pin. The V
CAP
Characteristics”.
/V
Characteristics”.
DDCORE
)
Section 31.0 “Electrical
DD
Figure 2-3
CAP
level of these
Regulator”.
/V
pin must not be
DD
DDCORE
requirement,
to evaluate
pin to
Preliminary
PIC18F66K80 FAMILY
FIGURE 2-3:
2.5
The PGC and PGD pins are used for In-Circuit Serial
Programming™ (ICSP™) and debugging purposes. It
is recommended to keep the trace length between the
ICSP connector and the ICSP pins on the device as
short as possible. If the ICSP connector is expected to
experience an ESD event, a series resistor is recom-
mended, with the value in the range of a few tens of
ohms, not to exceed 100Ω.
Pull-up resistors, series diodes, and capacitors on the
PGC and PGD pins are not recommended as they will
interfere with the programmer/debugger communica-
tions to the device. If such discrete components are an
application requirement, they should be removed from
the circuit during programming and debugging. Alter-
natively, refer to the AC/DC characteristics and timing
requirements information in the respective device
Flash programming specification for information on
capacitive loading limits, and pin input voltage high
(V
For device emulation, ensure that the “Communication
Channel Select” (i.e., PGCx/PGDx pins) programmed
into the device matches the physical connections for
the ICSP to the Microchip debugger/emulator tool.
For
development tools connection requirements, refer to
Section 30.0 “Development
IH
0.001
Note:
0.01
) and input low (V
0.1
10
more
1
0.01
ICSP Pins
Typical data measurement at 25°C, 0V DC bias.
information
0.1
Frequency (MHz)
IL
FREQUENCY vs. ESR
PERFORMANCE FOR
SUGGESTED V
1
) requirements.
on
10
Support”.
available
100
DS39977C-page 49
CAP
1000 10,000
Microchip
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