PIC18F46K80T-I/ML Microchip Technology, PIC18F46K80T-I/ML Datasheet - Page 53
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PIC18F46K80T-I/ML
Manufacturer Part Number
PIC18F46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.0
3.1
The PIC18F66K80 family of devices can be operated in
the following oscillator modes:
• EC
• ECIO
• HS
• XT
• LP
• RC
• RCIO
• INTIO2 Internal Oscillator with I/O on RA6 and
• INTIO1 Internal Oscillator with F
There is also an option for running the 4xPLL on any of
the clock sources in the input frequency range of 4 to
16 MHz.
The PLL is enabled by setting the PLLCFG bit
(CONFIG1H<4>) or the PLLEN bit (OSCTUNE<6>).
For the EC and HS modes, the PLLEN (software) or
PLLCFG (CONFIG1H<4>) bit can be used to enable
the PLL.
For the INTIOx modes (HF-INTOSC):
• Only the PLLEN can enable the PLL (PLLCFG is
• When the oscillator is configured for the internal
When the RA6 and RA7 pins are not used for an oscil-
lator function or CLKOUT function, they are available
as general purpose I/Os.
2011 Microchip Technology Inc.
ignored).
oscillator (FOSC<3:0> = 100x), the PLL can be
enabled only when the HF-INTOSC frequency is
4, 8 or 16 MHz.
OSCILLATOR
CONFIGURATIONS
Oscillator Types
External Resistor/Capacitor, RA6
Available
External Resistor/Capacitor, Clock Out
RA6 (F
RA7
RA6 and I/O on RA7
External Clock, RA6 Available
External Clock, Clock Out RA6 (F
High-Speed Crystal/Resonator
Crystal/Resonator
Low-Power Crystal
on RA6)
OSC
/4 on RA6)
OSC
/4 Output on
OSC
/4
Preliminary
PIC18F66K80 FAMILY
To optimize power consumption when using EC/HS/
XT/LP/RC as the primary oscillator, the frequency input
range can be configured to yield an optimized power
bias:
• Low-Power Bias – External frequency less than
• Medium Power Bias – External frequency
• High-Power Bias – External frequency greater
All of these modes are selected by the user by
programming the FOSC<3:0> Configuration bits
(CONFIG1H<3:0>). In addition, PIC18F66K80 family
devices can switch between different clock sources,
either under software control, or under certain condi-
tions, automatically. This allows for additional power
savings by managing device clock speed in real time
without resetting the application. The clock sources for
the PIC18F66K80 family of devices are shown in
Figure
For the HS and EC mode, there are additional power
modes of operation, depending on the frequency of
operation.
HS1 is the Medium Power mode with a frequency
range of 4 MHz to 16 MHz. HS2 is the High-Power
mode, where the oscillator frequency can go from
16 MHz to 25 MHz. HS1 and HS2 are achieved by
setting the CONFIG1H<3:0> bits correctly. (For details,
see
EC mode has these modes of operation:
• EC1 – For low power with a frequency range up to
• EC2 – Medium power with a frequency range of
• EC3 – High power with a frequency range of
EC1, EC2 and EC3 are achieved by setting the
CONFIG1H<3:0>
Register 28-2
Table 3-1
range and FOSC<3:0> settings.
160 kHz
between 160 kHz and 16 MHz
than 16 MHz
160 kHz
160 kHz to 16 MHz
16 MHz to 64 MHz
Register 28-2
3-1.
shows the HS and EC modes’ frequency
on page 464.)
on page 464.)
correctly.
(For
DS39977C-page 53
details,
see
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