PIC18F46K80T-I/ML Microchip Technology, PIC18F46K80T-I/ML Datasheet - Page 436
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18F46K80T-I/ML
Manufacturer Part Number
PIC18F46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F66K80 FAMILY
REGISTER 27-54: BRGCON3: BAUD RATE CONTROL REGISTER 3
DS39977C-page 436
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-3
bit 2-0
Note 1:
WAKDIS
R/W-0
Ignored if SEG2PHTS bit (BRGCON2<7>) is ‘ 0 ’.
WAKDIS: Wake-up Disable bit
1 = Disable CAN bus activity wake-up feature
0 = Enable CAN bus activity wake-up feature
WAKFIL: Selects CAN bus Line Filter for Wake-up bit
1 = Use CAN bus line filter for wake-up
0 = CAN bus line filter is not used for wake-up
Unimplemented: Read as ‘ 0 ’
SEG2PH<2:0>: Phase Segment 2 Time Select bits
111 = Phase Segment 2 time = 8 x T
110 = Phase Segment 2 time = 7 x T
101 = Phase Segment 2 time = 6 x T
100 = Phase Segment 2 time = 5 x T
011 = Phase Segment 2 time = 4 x T
010 = Phase Segment 2 time = 3 x T
001 = Phase Segment 2 time = 2 x T
000 = Phase Segment 2 time = 1 x T
WAKFIL
R/W-0
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
Preliminary
—
Q
Q
Q
Q
Q
Q
Q
Q
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
(1)
SEG2PH2
R/W-0
(1)
2011 Microchip Technology Inc.
x = Bit is unknown
SEG2PH1
R/W-0
(1)
SEG2PH0
R/W-0
bit 0
(1)
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