PIC18F46K80T-I/ML Microchip Technology, PIC18F46K80T-I/ML Datasheet - Page 285
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18F46K80T-I/ML
Manufacturer Part Number
PIC18F46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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A shutdown condition is indicated by the ECCP1ASE
(Auto-Shutdown Event Status) bit (ECCP1AS<7>). If
the bit is a ‘ 0 ’, the PWM pins are operating normally. If
the bit is a ‘ 1 ’, the PWM outputs are in the shutdown
state.
When a shutdown event occurs, two things happen:
• The ECCP1ASE bit is set to ‘ 1 ’. The ECCP1ASE
• The enabled PWM pins are asynchronously
REGISTER 20-3:
2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-4
bit 3-2
bit 1-0
ECCP1ASE
will remain set until cleared in firmware or an
auto-restart occurs. (See Section 20.4.5
“Auto-Restart Mode” .)
placed in their shutdown states. The PWM output
pins are grouped into pairs (P1A/P1C) and
(P1B/P1D). The state of each pin pair is
determined by the PSS1AC and PSS1BD bits
(ECCP1AS<3:2> and <1:0>, respectively).
Note 1: The auto-shutdown condition is a level-based signal, not an edge-based signal. As long as the level is
R/W-0
2: Writing to the ECCP1ASE bit is disabled while an auto-shutdown condition persists.
3: Once the auto-shutdown condition has been removed and the PWM restarted (either through firmware or
present, the auto-shutdown will persist.
auto-restart), the PWM signal will always restart at the beginning of the next PWM period.
ECCP1ASE: ECCP Auto-Shutdown Event Status bit
1 = A shutdown event has occurred; ECCP outputs are in a shutdown state
0 = ECCP outputs are operating
ECCP1AS<2:0>: ECCP Auto-Shutdown Source Select bits
000 = Auto-shutdown is disabled
001 = Comparator C1OUT output is high
010 = Comparator C2OUT output is high
011 = Either Comparator C1OUT or C2OUT is high
100 = V
101 = V
110 = V
111 = V
PSS1AC<1:0>: P1A and P1C Pins Shutdown State Control bits
00 = Drive pins, P1A and P1C, to ‘ 0 ’
01 = Drive pins, P1A and P1C, to ‘ 1 ’
1x = Pins, P1A and P1C, tri-state
PSS1BD<1:0>: P1B and P1D Pins Shutdown State Control bits
00 = Drive pins, P1B and P1D, to ‘ 0 ’
01 = Drive pins, P1B and P1D, to ‘ 1 ’
1x = Pins, P1B and P1D, tri-state
ECCP1AS2
R/W-0
ECCP1AS: ECCP1 AUTO-SHUTDOWN CONTROL REGISTER
IL
IL
IL
IL
on FLT0 pin
on FLT0 pin or Comparator C1OUT output is high
on FLT0 pin or Comparator C2OUT output is high
on FLT0 pin or Comparator C1OUT or Comparator C2OUT is high
W = Writable bit
‘1’ = Bit is set
ECCP1AS1
R/W-0
ECCP1AS0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
PSS1AC1
R/W-0
Each pin pair may be placed into one of three states:
• Drive logic ‘ 1 ’
• Drive logic ‘ 0 ’
• Tri-state (high-impedance)
PSS1AC0
R/W-0
x = Bit is unknown
PSS1BD1
R/W-0
DS39977C-page 285
PSS1BD0
R/W-0
bit 0
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