PIC24F04KA201T-I/SS Microchip Technology, PIC24F04KA201T-I/SS Datasheet - Page 111
![PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC24F04KA201T-I/SS
Manufacturer Part Number
PIC24F04KA201T-I/SS
Description
PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24F04KA201-ISS.pdf
(8 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F04KA201-ISS.pdf
(224 pages)
4.PIC24F04KA201-ISS.pdf
(26 pages)
Specifications of PIC24F04KA201T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (1.375K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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13.0
The input capture module is used to capture a timer
value from one of two selectable time bases upon an
event on an input pin.
The input capture features are quite useful in
applications requiring frequency (Time Period) and
pulse measurement. Figure 13-1 depicts a simplified
block diagram of the input capture module.
FIGURE 13-1:
© 2009 Microchip Technology Inc.
Note:
IC1 Pin
INPUT CAPTURE
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on Input
Capture, refer to the “PIC24F Family
Reference Manual”, Section 15. “Input
Capture” (DS39701).
Prescaler
(1, 4, 16)
Counter
3
INPUT CAPTURE BLOCK DIAGRAM
System Bus
IC1CON
ICM<2:0> (IC1CON<2:0>)
ICOV, ICBNE (IC1CON<4:3>)
Mode Select
Edge Detection Logic
Clock Synchronizer
ICI<1:0>
Preliminary
PIC24F04KA201 FAMILY
(in IFSn Register)
Set Flag IC1IF
Interrupt
Logic
The PIC24F04KA201 family devices have one input
capture channel. The input capture module has
multiple operating modes, which are selected via the
IC1CON register. The operating modes include:
• Capture timer value on every falling edge of input
• Capture timer value on every rising edge of input
• Capture timer value on every 4
• Capture timer value on every 16
• Capture timer value on every rising and every
• Device wake-up from capture pin during CPU
The input capture module has a four-level FIFO buffer.
The number of capture events required to generate a
CPU interrupt can be selected by the user.
applied at the IC1 pin
applied at the IC1 pin
input applied at the IC1 pin
input applied at the IC1 pin
falling edge of input applied at the IC1 pin
Sleep and Idle modes
Logic
FIFO
R/W
From 16-Bit Timers
TMRy TMRx
1
IC1BUF
16
th
th
rising edge of
0
DS39937B-page 109
rising edge of
16
(IC1CON<7>)
ICTMR
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