PIC24F04KA201T-I/SS Microchip Technology, PIC24F04KA201T-I/SS Datasheet - Page 171
![PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC24F04KA201T-I/SS
Manufacturer Part Number
PIC24F04KA201T-I/SS
Description
PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24F04KA201-ISS.pdf
(8 pages)
2.PIC24F04KA201-ISS.pdf
(48 pages)
3.PIC24F04KA201-ISS.pdf
(224 pages)
4.PIC24F04KA201-ISS.pdf
(26 pages)
Specifications of PIC24F04KA201T-I/SS
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (1.375K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC24F04KA201-ISS PDF datasheet
- PIC24F04KA201-ISS PDF datasheet #2
- PIC24F04KA201-ISS PDF datasheet #3
- PIC24F04KA201-ISS PDF datasheet #4
- Current page: 171 of 224
- Download datasheet (4Mb)
REGISTER 23-8:
REGISTER 23-9:
© 2009 Microchip Technology Inc.
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-16
bit 15-8
bit 7-0
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-4
bit 3-0
FAMID7
DEV7
U-0
U-0
U-0
U-0
—
—
—
—
R
R
Unimplemented: Read as ‘0’
FAMID<7:0>: Device Family Identifier bits
00001011 = PIC24F04KA201 family
DEV<7:0>: Individual Device Identifier bits
00000000 = PIC24F04KA201
00000010 = PIC24F04KA200
Unimplemented: Read as ‘0’
REV<3:0>: Minor Revision Identifier bits
FAMID6
DEV6
U-0
U-0
U-0
U-0
—
—
—
—
R
R
DEVID: DEVICE ID REGISTER
DEVREV: DEVICE REVISION REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
FAMID5
DEV5
U-0
U-0
U-0
U-0
—
—
—
—
R
R
FAMID4
DEV4
U-0
U-0
U-0
U-0
—
—
—
—
R
R
Preliminary
PIC24F04KA201 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FAMID3
DEV3
REV3
U-0
U-0
U-0
—
—
—
R
R
R
FAMID2
DEV2
REV2
U-0
U-0
U-0
—
—
—
R
R
R
x = Bit is unknown
x = Bit is unknown
FAMID1
DEV1
REV1
U-0
U-0
U-0
—
—
—
R
R
R
DS39937B-page 169
FAMID0
DEV0
REV0
U-0
U-0
U-0
—
—
—
R
R
R
bit 16
bit 16
bit 8
bit 0
bit 8
bit 0
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