PIC24F08KA102-E/ML Microchip Technology, PIC24F08KA102-E/ML Datasheet - Page 167
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PIC24F08KA102-E/ML
Manufacturer Part Number
PIC24F08KA102-E/ML
Description
8KB Flash, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O,16-bit PIC24F Family, NanoWat
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet
1.MA240017.pdf
(254 pages)
Specifications of PIC24F08KA102-E/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (2.75K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC24F
Core
PIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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20.3
There are four registers used to control programmable
CRC operation:
• CRCCON
• CRCXOR
• CRCDAT
• CRCWDAT
REGISTER 20-1:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12-8
bit 7
bit 6
bit 5
bit 4
bit 3-0
R-0, HSC
CRCFUL
U-0
—
Registers
Unimplemented: Read as ‘0’
CSIDL: CRC Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
VWORD<4:0>: Pointer Value bits
Indicates the number of valid words in the FIFO. Has a maximum value of 8 when PLEN<3:0> > 7, or
16 when PLEN<3:0>
CRCFUL: FIFO Full bit
1 = FIFO is full
0 = FIFO is not full
CRCMPT: FIFO Empty Bit
1 = FIFO is empty
0 = FIFO is not empty
Unimplemented: Read as ‘0’
CRCGO: Start CRC bit
1 = Start CRC serial shifter
0 = CRC serial shifter turned off
PLEN<3:0>: Polynomial Length bits
Denotes the length of the polynomial to be generated minus 1.
R-1, HSC
CRCMPT
U-0
—
CRCCON: CRC CONTROL REGISTER
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
CSIDL
R/W-0
U-0
—
≤
7.
VWORD4
R-0, HSC
CRCGO
R/W-0
Preliminary
PIC24F16KA102 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
VWORD3
R-0, HSC
PLEN3
R/W-0
VWORD2
R-0, HSC
PLEN2
R/W-0
x = Bit is unknown
VWORD1
R-0, HSC
PLEN1
R/W-0
DS39927B-page 165
VWORD0
R-0, HSC
PLEN0
R/W-0
bit 8
bit 0
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