PIC24F08KA102-E/ML Microchip Technology, PIC24F08KA102-E/ML Datasheet - Page 191
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PIC24F08KA102-E/ML
Manufacturer Part Number
PIC24F08KA102-E/ML
Description
8KB Flash, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O,16-bit PIC24F Family, NanoWat
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet
1.MA240017.pdf
(254 pages)
Specifications of PIC24F08KA102-E/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (2.75K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC24F
Core
PIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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26.0
PIC24F16KA102 family devices include several
features intended to maximize application flexibility and
reliability, and minimize cost through elimination of
external components. These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit Emulation
REGISTER 26-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-1
bit 0
Note 1:
Note:
U-0
—
SPECIAL FEATURES
This selection should not be used in PIC24F08KA1XX devices.
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on the
Watchdog
Integration and Programming Diagnostics,
refer to the individual sections of the
“PIC24F
provided below:
• Section 9. “Watchdog Timer (WDT)”
• Section 36. “High-Level Integration
• Section 33. “Programming and
(DS39697)
with Programmable High/Low-Voltage
Detect (HLVD)” (DS39725)
Diagnostics” (DS39716)
Unimplemented: Read as ‘0’
BSS<2:0>: Boot Segment Program Flash Code Protection bits
111 = No boot program Flash segment
011 = Reserved
110 = Standard security, boot program Flash segment starts at 200h, ends at 000AFEh
010 = High security boot program Flash segment starts at 200h, ends at 000AFEh
101 = Standard security, boot program Flash segment starts at 200h, ends at 0015FEh
001 = High security, boot program Flash segment starts at 200h, ends at 0015FEh
100 = Reserved
000 = Reserved
BWRP: Boot Segment Program Flash Write Protection bit
1 = Boot segment may be written
0 = Boot segment is write-protected
U-0
—
FBS: BOOT SEGMENT CONFIGURATION REGISTER
Family
Timer,
W = Writable bit
‘1’ = Bit is set
Reference
High-Level
U-0
—
Manual”
Device
U-0
—
Preliminary
PIC24F16KA102 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
26.1
The Configuration bits can be programmed (read as ‘0’),
or left unprogrammed (read as ‘1’), to select various
device configurations. These bits are mapped starting at
program memory location, F80000h. A complete list is
provided in Table 26-1. A detailed explanation of the
various bit functions is provided in Register 26-1 through
Register 26-8.
The address, F80000h, is beyond the user program
memory space. In fact, it belongs to the configuration
memory space (800000h-FFFFFFh), which can only be
accessed using table reads and table writes.
TABLE 26-1:
BSS2
FBS
FGS
FOSCSEL
FOSC
FWDT
FPOR
FICD
FDS
Configuration
Register
Configuration Bits
R/W-1
BSS1
CONFIGURATION REGISTERS
LOCATIONS
x = Bit is unknown
R/W-1
BSS0
Address
F8000C
F8000A
F8000E
F80000
F80004
F80006
F80008
F80010
(1)
DS39927B-page 189
(1)
BWRP
R/W-1
bit 0
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